参数资料
| 型号： | PT7C43390WEX |
| 厂商： | Pericom |
| 文件页数： | 2/23页 |
| 文件大小： | 0K |
| 描述： | IC REAL TIME CLOCK 8SOIC |
| 标准包装： | 1 |
| 类型： | 时钟/日历 |
| 特点： | 警报器，闰年，方波输出 |
| 时间格式： | HH:MM:SS（12/24 小时） |
| 数据格式： | YY-MM-DD-dd |
| 接口： | I²C，2 线串口 |
| 电源电压： | 1.3 V ~ 5.5 V |
| 电压 - 电源，电池： | 1.1 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 标准包装 |
| 其它名称： | PT7C43390WEXDKR |
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PT0280(08/09)
Ver: 3
10
Data Sheet
PT7C43390
2-Wire Real-time Clock Module
Register State After Initialization
The state of each register after initialization is as follows.
Real-time data register:
00 (year), 01 (month), 01 (day), 0 (day of week), 00 (hour), 00 (minute), 00 (second)
Status register_1:
“0 h * * * 0 b”(B3, B2, and B1 are user setting data.)
Status register_2:
“00h”
INT1 register_1:
“00h”
INT1 register_2:
“00h”
Clock adjustment register: “00h”
Free register:
“00h”
Power Supply Voltage Detector
PT7C43390 has an internal power supply voltage detector, which monitors drops in the power supply voltage by reading the BLD
flag. This circuit samples the voltage for only 15.6 ms per second. If the power supply voltage drops below the detection voltage
(VDET), the BLD latch circuit latches the “H” level, bit 6 (BLD flag) of internal status register_1 is set to “1”, and sampling stops.
Detection voltage and release voltage have approximate 0.15V(Typ.) of hysteresis width respectively (Refer to “Characteristics”).
Once “1” is detected in the BLD flag, no detection operation is performed unless initialization is performed or the BLD flag is
read by the status register_1 access command, and “1” is held in the BLD flag. Sampling resumes only when the subsequent
communication action is initialization or BLD flag read.
In addition, if this BLD flag is “1” after the power supply voltage is recovered, it must be initialized.
Caution In case the power supply voltage falls and returns after the latch circuit latches “H”, the BLD flag can be read as
“1” by a status register_1 accsess command first. After that the sampling is resumed and the read-out of the next
BLD flag is performed, the BLD flag is reset and read as “0”. Refer to the timing chart below.
Processing of Nonexistent Data and End-of-Month
When real-time data is written, the data is checked for validity, invalid data is processed, and the end-of month is corrected.
[Processing of nonexistent data]
Register
Normal Data
Error Data
Result
Year data
00 to 99
XA to XF, AX to FX
00
Month data
01 to 12
00, 13 to 19, XA to XF
01
Day data
01 to 31
00, 32 to 39, XA to XF
01
Day of week data
0 to 6
7
0
Hour data *1 (24-hour)
(12-hour)
0 to 23
0 to 11
24 to 29, 3X, XA to XF
12 to 19, 2X, 3X, XA to XF
00
Minute data
00 to 59
60 to 79, XA to XF
00
Second data *2
00 to 59
60 to 79, XA to XF
00
*1. For 12-hour expression, write the AM/PM flag.
The AM/PM flag is ignored in 24-hour expression, but “0” for 0 to 11 hours and “1” for 12 to 23 hours are read in a read
operation.
*2. Processing of nonexistent data for second data is performed by a carry pulse one second after the end of writing. At this point,
the carry pulse is sent to the minute counter.
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