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| 型号： | PTRF1221IRGZR |
| 厂商： | Texas Instruments |
| 文件页数： | 13/31页 |
| 文件大小： | 0K |
| 描述： | PTRF1221IRGZR |
| 产品培训模块： | RFID Technology and Applications |
| 标准包装： | 2,500 |
| 功能： | 升频器 |
| 频率： | 1.7GHz ~ 3.6GHz |
| RF 型： | UHF |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
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TRF1121
www.ti.com
TRF1221
SLWS170B – APRIL 2005 – REVISED JANUARY 2008
The TRF1121/TRF1221 contains two independent S-band VCOs and resonator circuits to provide additional
frequency range from one IC, however only one VCO can be enabled at a time. These two VCOs are referred to
as VCO2A and VCO2B (see the block diagram). The S-band PLL (LO2A or LO2B) frequency of oscillation is set
by the following equation:
f out = REFIN ′ ê ú
8 ′ (N + 3) - S -
é F ù
? 18 ?
(2)
where:
F = synthesizer F counter
N = synthesizer N divider
S = synthesizer S counter (see Figure 8 )
F has a range of 0 to 17. Both N and S have ranges that are limited more by the LO range than by their digital
count.
Both synthesizers have a fractional architecture, which allows a high comparison frequency relative to the step
size. The S-band PLL operates at a reference frequency of 18 MHz with a minimum phase accumulator
frequency of 1 MHz. The UHF PLL operates at a 9-MHz reference with a minimum phase accumulator frequency
of 0.5 MHz. The S-band PLL has a step size of 1 MHz and the UHF PLL has a step size of 50 kHz (TRF1121) or
62.5 kHz (TRF1221), when using an 18-MHz reference frequency. Different reference frequencies yield different
step sizes, many of which are non-integer. If a different reference frequency is chosen, the step size is linearly
related to the step size for 18 MHz.
Step size = step size at 18 MHz × [REF FREQ / 18 MHz]
In addition to the normal reference spurious signals at the comparison frequency, fractional synthesizers have
fractional spurs. The fractional spurs occur at an offset from the LO signal that is dependent on the difference
between the LO frequency and integer multiples of the reference frequency. They occur on both sides of the LO
carrier. The spur locations can be found by the following process: divide the LO frequency by the reference
frequency, take the remainder (fraction to the right of the whole number) and multiply it by the reference
frequency. This frequency is the difference between the actual LO frequency and an integer-multiple of the
reference frequency. Fractional spurs occur at this frequency and the reference frequency minus this frequency.
The following example best explains the process: if LO2 is set to 2206 MHz when using an 18-MHz reference
frequency, then 2206/18 is 122.55556. The difference between the LO and 122 × 18 MHz is:
0.55556 × 18 MHz = 10 MHz
The fractional spurs occur at this frequency offset (10 MHz) from LO2 and:
18–10 MHz or 8 MHz offset from LO2.
The fractional spurious level varies with the offset from the LO because the spurs are attenuated by the loop filter
response. The larger the offset from the LO, the lower the spur level. In general, spurs at offsets greater than
3 MHz or 4 MHz are below –75 dBc and are not a concern. The worst fractional spur levels occur when they are
located at 1-MHz offsets from the LO2. (Note: the fractional spurs are offset from the LO2 by 1 MHz when the
difference between the LO2 and an integer multiple of the reference frequency is 1 MHz or 17 MHz).
Although both synthesizers have fractional spurs, for most applications the spurious signals from the UHF
synthesizer can be ignored because the LO1 spurs are filtered by the IF2 filter and attenuated by frequency
dividers that are located after the LO1 generation. In some frequency plans it is possible to offset LO1 and LO2
to avoid worst case fractional spurs (at 1-MHz offsets) on LO2.
Copyright ? 2005–2008, Texas Instruments Incorporated
Product Folder Link(s): TRF1121 TRF1221
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