www.ti.com
ELECTRICAL CHARACTERISTICS
SLTS243A – FEBRUARY 2005 – REVISED OCTOBER 2007
operating at 25
°C free-air temperature, V
I = 3.3 V, VO = 2.5 V, C1 = 680 F, C2 = 22 F, C3 = 0 F, and IO = IO max (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IO
Output current
Natural convection airflow
0
18 (1)
A
VI
Input voltage range
Over IO load range
2.95 (2)
3.6
V
Set-point voltage tolerance
2% (3)
Temperature variation
–40
°C < T
A < 85°C
0.5%
Line regulation
Over VI range
5
mV
VO
Load regulation
Over IO range
5
mV
Total output variation
Includes set-point, line, load, –40
°C ≤ T
A ≤ 85°C
3 (3)
%Vo
Adjust range
Over VI range
0.8
2.5
V
RSET = 2.21 k, VO = 2.5 V
95%
RSET = 5.49 k, VO = 1.8 V
92%
RSET = 8.87 k, VO = 1.5 V
90%
η
Efficiency
IO = 12 A
RSET = 17.4 k, VO = 1.2 V
88%
RSET = 36.5 k, VO = 1 V
86%
RSET = Open, VO = 0.8 V
83%
Output voltage ripple
20-MHz bandwidth
20
mVPP
(pk-pk)
IO (trip)
Overcurrent threshold
Reset, followed by auto-recovery
35
A
1-A/
s load step, 50 to 100% I
O max, C3 = 330 F
Transient response
Recovery time
70
s
Vo over/undershoot
120
mV
IIL Input low current
Pin to GND
–0.13
mA
Track control (pin 9)
Control slew-rate limit
C3
≤ C3 (max)
1
V/ms
VI increasing
2.8
2.95
UVLO
Undervoltage lockout
V
VI decreasing
2.2
2.7
VIH Input high voltage
VI – 0.5
Open (4)
Referenced to GND
V
Inhibit control (pin 12)
VIL Input low voltage
–0.2
0.6
IIL Input low current
Pin to GND
0.24
mA
II (stby)
Input standby current
Inhibit (pin 12) to GND, Track (pin 9) open
10
mA
S
Switching frequency
Over VI and IO ranges
250
300
340
kHz
Nonceramic (C1)
680 (5)
External input capacitance
F
Ceramic (C2)
22 (5)
Nonceramic
0
330 (6)
11,000 (7)
Capacitance value
F
External output capacitance
Ceramic
0
300
(C3)
Equivalent series resistance (nonceramic)
4 (8)
m
Per Telcordia SR-332, 50% stress, TA = 40°C, ground
MTBF
Reliability
5
106 Hr
benign
(1)
See thermal derating curves for safe operating area (SOA), or consult factory for appropriate derating.
(2)
The minimum input voltage is 2.95 V or VO + 0.65 V, whichever is greater.
(3)
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1%, with 100 ppm/
°C or better temperature stability.
(4)
This control pin is pulled up to the input voltage, VI. If this input is left open circuit, the module will operate when input power is applied.
A small low-leakage (< 100 nA) MOSFET is recommended for control. For further information, consult the related application note.
(5)
A 22-
F high-frequency ceramic capacitor and 680-F electrolytic input capacitor are required for proper operation. The electrolytic
capacitor must be rated for 750 mArms minimum ripple current. Consult the Application Information for further guidance on capacitor
selection.
(6)
An external output capacitor is not required for basic operation. Adding 330
F of distributed capacitance at the load improves the
transient response.
(7)
This is the calculated maximum. The minimum ESR limitation often results in a lower value. When controlling the Track pin using a
voltage supervisor, CO(max) is reduced to 6600 F. Consult the Application Information for further guidance.
(8)
This is the typical ESR for all the electrolytic (nonceramic) output capacitance. Use 7 m
as the minimum when using maximum-ESR
values to calculate.
Copyright 2005–2007, Texas Instruments Incorporated
3