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参数资料
| 型号： | PW-82351-120 |
| 厂商： | DATA DEVICE CORP |
| 元件分类： | 运动控制电子 |
| 英文描述： | BRUSHLESS DC MOTOR CONTROLLER, 150 A, XMA |
| 文件页数： | 5/16页 |
| 文件大小： | 273K |
| 代理商： | PW-82351-120 |
13
J1
Dual function pin controlled by INPUT SEL. A logic ‘0’ on Input Sel activates LA and a logic ‘1’ on Input Sel activates PWM.
Dual function pin controlled by INPUT SEL. A logic ‘0’ on Input Sel activates UA and a logic ‘1’ on Input Sel activates DIR.
PIN
PIN FUNCTION
Dual function pin controlled by INPUT SEL. A logic ‘0’ on Input Sel activates LC and a logic ‘1’ on Input Sel activates IDIR pin.
J1-1
OV ADJ
Dual function pin controlled by INPUT SEL. A logic ‘0’ on Input Sel enables UB and a logic ‘1’ on Input Sel activates Brake.
Dual function pin controlled by INPUT SEL. A logic ‘0’ on Input Sel enables LC and a logic ‘1’ on Input Sel activates Brake PWM.
Dual function pin controlled by INPUT SEL. A logic ‘0’ on Input Sel enables UC and a logic ‘1’ on Input Sel activates 2Q-4Q
3
HALL FLAG
This is an active high input and must be tied low to activate the input control logic.
4
SC FLAG
J1
Controls the operation of the dual function input pins UA /DIR, LA /PWM, UB / BRAKE, LB /IDIR, UC/2Q-4Q, LC / BRAKE PWM.
A logic low enables the input control logic to operate each of the output switches independently UA, LA, UB, LB, UC, LC.
A logic high enables the self-commutated mode.
5
ICONTROL
An active high logic input that is tied low for composite phase current mode or tied high for individual phase current mode.
6
INPUT SEL
2
N/C
A logic low output indicates that a short has occurred.
7
DISABLE / ENABLE
A logic high indicates an illegal input on HA,HB, HC.
8
UC / 2Q-4Q
9
LC / BRAKE PWM
10
UB / BRAKE
An external resistor connected to this input from OV ADJ VCC or OV ADJ RTN sets the over voltage trip level.
11
LB /IDIR
DESCRIPTION
12
UA / DIR
J1
13
LA / PWM
A logic high output indicates that over voltage condition has occurred.
14
OV FLAG OUT
15
N/C
Return for logic power supply.
(see FIGURE 6, page 9)
16
DIG GND
TABLE 8. PW-82351 PIN ASSIGNMENT AND FUNCTION DESCRIPTION
J2
Negative power supply input for -15 V power.
(see FIGURE 6, page 9)
Return for ±15 V power.
(see FIGURE 6, page 9)
PIN
FUNCTION
Positive power supply input for +15 V power.
(see FIGURE 6, page 9)
J2-1
N/C
Dual function pin. Composite current (derived from Phase A & Phase C currents processed internally) or Phase B current.
2
HA
Phase C current obtained from motor current sensing output ( ISENSE ) in Phase C.
J2
Phase A current obtained from motor current sensing output (ISENSE) in Phase A.
4
HB
A +5 V logic supply voltage for the control section.
(see FIGURE 6, page 9)
5
UV FLAG
6
UMC
This is the return for the internal DC-DC power supply.
(see FIGURE 6, page 9)
7
N/C
8
POWER GND
A logic low or high on this pin enables or disables the internal DC-DC power supply respectively.
9
N/C
This output goes low when an under voltage condition occurs on the +15 V or +5 V power supplies or when UMC is disabled.
10
+5V
This input is connected to the motor shaft HALL sensors and is set for 120
° commutation.
11
IA OUT
3
12
IC OUT
This input is connected to the motor shaft HALL sensors and is set for 120
° commutation.
13
ICOMP / I OUTB
14
+15V
DESCRIPTION
15
ANA GND
HC
16
–15V
This input is connected to the motor shaft HALL sensors and is set for 120
° commutation
J3
PIN
FUNCTION
J3-1
RTN
2
PHASE AOUT
Supply power for output stage.
3
OVER VOLTAGE LOW
Phase C output.
4
PHASE BOUT
Phase B output.
5
PHASE COUT
An external resistor is connected between this pin and VCC to allow flyback current to bleed off the supply.
6
VCC
Phase A output.
Supply power return for output stage.
DESCRIPTION
J3
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