参数资料
型号: QL3025
厂商: QuickLogic Corp.
英文描述: pASIC3 FPGA Combining High Performance and High Density(高性能和高密度相结合的pASIC3现场可编程门阵列)
中文描述: pASIC3 FPGA的结合高性能和高密度(高性能和高密度相结合的pASIC3现场可编程门阵列)
文件页数: 14/14页
文件大小: 239K
代理商: QL3025
36
Preliminary
8-36
Military Plastic pASIC 3 Family
Pin Descriptions
Ordering Information
Pin
TDI
Function
Test Data In for JTAG
Description
Hold HIGH during normal operation. Connect to
VCC if not used for JTAG.
Hold LOW during normal operation. Connect to
ground if not used for JTAG.
Hold HIGH during normal operation. Connect to
VCC if not used for JTAG.
Hold HIGH or LOW during normal operation.
Connect to VCC or ground if not used for JTAG.
Output that must be left unconnected if not used for
JTAG.
Must be grounded during normal operation.
Can be configured as either or both.
TRSTB
Active low Reset for JTAG
TMS
Test Mode Select for JTAG
TCK
Test Clock for JTAG
TDO
Test data out for JTAG
STM
I/ACLK
Special Test Mode
High-drive input and/or
array network driver
High-drive input and/or
global network driver
High-drive input
Input/Output pin
Power supply pin
Input voltage tolerance pin
I/GCLK
Can be configured as either or both.
I
I/O
VCC
VCCIO
Use for input signals with high fanout.
Can be configured as an input and/or output.
Connect to 3.3V supply.
Connect to 5.0 volt supply if 5 volt input tolerance is
required, otherwise connect to 3.3V supply.
Connect to ground.
Available on 456-PBGA only. Connect to ground
plane on PCB if heat sinking desired. Otherwise
may be left unconnected.
GND
GND/THERM
Ground pin
Ground/Thermal pin
QL 3060 –1 PQ208 M
Operating Range
M = Military
Package Code
PL84 = 84-pin PLCC
PQ208 = 208-pin PQFP
QuickLogic
pASIC device
pASIC 3 device
part number
3012
3025
3040
3060
Speed Grade
0 = quick
1 = fast
2 = faster
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