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参数资料
| 型号： | QS74FCT2823BTQ |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 总线收发器 |
| 英文描述： | FCT SERIES, 9-BIT DRIVER, TRUE OUTPUT, PDSO24 |
| 封装： | QSOP-24 |
| 文件页数： | 5/7页 |
| 文件大小： | 60K |
| 代理商： | QS74FCT2823BTQ |
5
IDTQS74FCT2823AT/BT
HIGH-SPEEDCMOSBUSINTERFACE9-BITREGISTER
INDUSTRIALTEMPERATURERANGE
FCT2823AT
FCT2823BT
Symbol
Parameter
Min.
Max.
Min.
Max.
Unit
tPLH
Clock to Y Delay
—
10
—
7.5
ns
tPHL
OE = LOW
tPLH
Clock to Y Delay
—
20
—
15
ns
tPHL
OE = LOW(2)
tSU
Data to CP Setup Time
4
—
3
—
ns
tH
Data to CP Hold Time
2
—
1.5
—
ns
tENS
EN to CP Setup Time
4
—
3
—
ns
tENH
EN to CP Hold Time
2
—
0
—
ns
SWITCHING CHARACTERISTICS OVER OPERATING RANGE(1)
NOTES:
1. CLOAD = 50pF, RLOAD = 500
unless otherwise noted.
2. CLOAD = 300pF.
FCT2823AT
FCT2823BT
Symbol
Parameter(2)
Min.
Max.
Min.
Max.
Unit
tCLR
CLR to Y Delay
—
11
—
9
ns
tREC
CLR to CP Setup Time
6
—
6
—
ns
tPLH
Clock Pulse Width
7
—
6
—
ns
tPHL
HIGH or LOW
tPZH
OutputEnableTime
—
12
—
8
ns
tPZL
OE to Yx
tPZH
OutputEnableTime(3)
—23
—
ns
tPZL
OE to Yx
tPHZ
OutputDisableTime(4)
—
7
—
6.5
ns
tPLZ
OE to Yx
tPHZ
OutputDisableTime
—
9
—
7.5
ns
tPLZ
OE to Yx
TIMING REQUIREMENTS OVER OPERATING RANGE(1)
NOTES:
1. CLOAD = 50pF, RLOAD = 500
unless otherwise noted.
2. See Test Circuits and Waveforms
3. CLOAD = 300pF.
4. CLOAD = 5pF.
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相关代理商/技术参数 |
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|---|---|
| QS74FCT2823BTQX | 制造商:未知厂家 制造商全称:未知厂家 功能描述:9-Bit D-Type Flip-Flop |
| QS74FCT2823BTSO | 制造商:未知厂家 制造商全称:未知厂家 功能描述:9-Bit D-Type Flip-Flop |
| QS74FCT2823BTSOX | 制造商:未知厂家 制造商全称:未知厂家 功能描述:9-Bit D-Type Flip-Flop |
| QS74FCT2823CTP | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Integrated Device Technology Inc 功能描述: |
| QS74FCT2823CTQ | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Integrated Device Technology Inc 功能描述: |
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