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参数资料
| 型号： | R1LV1616RSD-7SI |
| 厂商： | Renesas Technology Corp. |
| 英文描述： | 16Mb superSRAM (1M wordx16bit) |
| 中文描述： | 16Mb的superSRAM（100万wordx16bit） |
| 文件页数： | 9/16页 |
| 文件大小： | 122K |
| 代理商： | R1LV1616RSD-7SI |
R1LV1616R Series
Rev.1.00
2004.04.13
page 9 of 16
Write Cycle
Note
1
.
t
CHZ,
t
OHZ,
t
WHZ
and
t
BHZ
are defined as the time at which the outputs achieve the open circuit conditions
and are not referred to output voltage levels.
2. This parameter is sampled and not 100% tested.
3. AT any given temperature and voltage condition,
t
HZ
max is less than
t
LZ
min both for a given device and
form device to device.
4. A write occurs during the overlap of a low CS1#, a high CS2, a low WE# and a low LB# or a low UB#.
A write begins at the latest transition among CS1# going low, CS2 going high, WE# going low and LB#
going low or UB# going low .
A write ends at the earliest transition among CS1# going high, CS2 going low, WE# going high and LB#
going high or UB# going high.
t
WP
is measured from the beginning of write to the end of write.
5.
t
CW
is measured from the later of CS1# going low or CS2 going high to end of write.
6.
t
AS
is measured the address valid to the beginning of write.
7.
t
WR
is measured from the earliest of CS1# or WE# going high or CS2 going low to the end of write cycle.
1,2
ns
30
0
25
0
t
WHZ
Write to output in high-Z
Write pulse width
1,2
ns
30
0
25
0
t
OHZ
Output disable to output in high-Z
2
ns
-
5
-
5
t
OW
Output active from end of write
ns
-
0
-
0
t
DH
Data hold from write time
ns
-
40
-
35
t
DW
Data to write time overlap
7
ns
-
0
-
0
t
WR
Write recovery time
6
ns
-
0
-
0
t
AS
Address setup time
ns
-
70
-
65
t
BW
LB#,UB# valid to end of write
4
ns
-
60
-
55
t
WP
5
ns
-
70
-
65
t
CW
Chip selection to end of write
ns
-
70
-
65
t
AW
Address valid to end of write
ns
-
85
-
70
t
WC
Write cycle time
Max.
Min.
Max.
Min.
Notes
Unit
R1LV1616R**-8S
R1LV1616R**-7S
Symbol
Parameter
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|---|---|
| R1LV1616RSD-7SR | 16Mb superSRAM (1M wordx16bit) |
| R1Q2A3609 | 36-Mbit QDR™II SRAM 2-word Burst |
| R1Q2A3609ABG-40R | 36-Mbit QDR™II SRAM 2-word Burst |
| R1Q2A3609ABG-50R | 36-Mbit QDR™II SRAM 2-word Burst |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| R1LV1616RSD-7SI#B0 | 功能描述:IC SRAM 16MBIT 70NS 52UTSOPII RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:1 系列:- 格式 - 存储器:RAM 存储器类型:SDRAM 存储容量:256M（8Mx32） 速度:143MHz 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:90-VFBGA 供应商设备封装:90-VFBGA（8x13） 包装:托盘 其它名称:Q2841869 |
| R1LV1616RSD-7SI#S0 | 制造商:Renesas Electronics Corporation 功能描述:ADVANCED LPSRAM, 16MB,1MX16, P 制造商:Renesas Electronics Corporation 功能描述:ADVANCED LPSRAM, 16MB,1MX16, PBFREE/T&R - Tape and Reel 制造商:Renesas Electronics Corporation 功能描述:IC SRAM 16MBIT 70NS 52TSOP |
| R1LV1616RSD-7SIB0 | 制造商:Renesas Electronics Corporation 功能描述:Low Power SRAM.16M,x8/x16,70ns,uTSOP52 |
| R1LV1616RSD-7SR | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:16Mb Advanced LPSRAM (1M wordx16bit / 2M wordx8bit) |
| R1LV1616RSD7SR#B0 | 制造商:Renesas 功能描述:SRAM Chip Async Single 3V 16M-Bit 2M/1M x 8/16-Bit 70ns 52-Pin TSOP-II T/R |
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