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参数资料
| 型号： | R1Q3A3636ABG-33R |
| 厂商： | Renesas Technology Corp. |
| 英文描述： | 36-Mbit QDR™II SRAM 4-word Burst |
| 文件页数： | 10/26页 |
| 文件大小： | 407K |
| 代理商： | R1Q3A3636ABG-33R |
R1Q3A3636/R1Q3A3618/R1Q3A3609
Bus Cycle State Diagram
Read Port NOP
R
Init
= 0
Read Double
R
Count
= R
Count
+ 2
Load New
Read Address
R
Count
= 0
R
Init
= 1
Power Up
/R = H
Write Port NOP
/W = H
Supply voltage
provided
Supplu voltage
provided
/R = L
Always
/R = L
&
R
Count
= 4
Increment
Read Address
by Two
*1
R
Init
= 0
Always
R
= 2
/R = H & R
Count
= 4
Write Double
W
Count
= W
Count
+ 2
Load New
Write Address
W
Count
= 0
/W = L
R
Init
= 0
Always
/W = L
&
W
Count
= 4
Increment
Write Address
by Two
*1
Always
W
= 2
/W = H & W
Count
= 4
Notes: 1. The address is concatenated with one additional internal LSB to facilitate burst operation. The address order
is always fixed as: xxx…xxx+0, xxx…xxx+1, xxx…xxx+2, xxx…xxx+3.
Bus cycle is terminated at the end of this sequence (burst count = 4).
2. Read and write state machines can be active simultaneously. Read and write cannot be simultaneously
initiated. Read takes precedence.
3. State machine control timing sequence is controlled by K.
Absolute Maximum Ratings
Parameter
Symbol
V
IN
V
I/O
V
DD
V
DDQ
Tj
T
STG
Rating
Unit
V
V
V
V
°C
°C
Notes
Input voltage on any ball
Input/output voltage
Core supply voltage
Output supply voltage
Junction temperature
Storage temperature
Notes: 1. All voltage is referenced to V
SS
.
2. Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation
should be restricted the Operation Conditions. Exposure to higher than recommended voltages for extended
periods of time could affect device reliability.
3. These CMOS memory circuits have been designed to meet the DC and AC specifications shown in the tables
after thermal equilibrium has been established.
4. The following supply voltage application sequence is recommended: V
SS
, V
DD
, V
DDQ
, V
REF
then V
IN
.
Remember, according to the Absolute Maximum Ratings table, V
DDQ
is not to exceed 2.5 V, whatever the
instantaneous value of V
DDQ
.
0.5 to V
DD
+ 0.5 (2.5 V max.)
0.5 to V
DDQ
+ 0.5 (2.5 V max.)
0.5 to 2.5
0.5 to V
DD
+125 (max)
55 to +125
1, 4
1, 4
1, 4
1, 4
REJ03C0295-0003 Rev.0.03 Jul. 31, 2007
Page 10 of 24
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相关代理商/技术参数 |
参数描述 |
|---|---|
| R1Q3A3636ABG-40R | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:36-Mbit QDR™II SRAM 4-word Burst |
| R1Q3A3636ABG40RB0 | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:36-Mbit QDR?II SRAM 2-word Burst |
| R1Q3A3636ABG40RS0 | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:36-Mbit QDR?II SRAM 2-word Burst |
| R1Q3A3636ABG40RT0 | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:36-Mbit QDR?II SRAM 2-word Burst |
| R1Q3A3636ABG-50R | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:36-Mbit QDR™II SRAM 4-word Burst |
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