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R38F1 Group, R38F2 Group, R38F3 Group
2. Central Processing Unit (CPU)
REJ03B0226-0001 Rev.0.01
Nov 21, 2007
Under development Preliminary specification
Notice: This is not a final specification. Some parametric limits are subject to change.
2.1
Accumulator (A)
The Accumulator (A) is an 8-bit register. Data operations such as arithmetic and data transfer are executed mainly
through this register.
2.2
Index Register X (X)
The Index Register (X) is an 8-bit register. In index addressing mode, this register is used for addressing.
2.3
Index Register Y (Y)
The Index Register (Y) is an 8-bit register. In index addressing mode, this register is used for addressing.
2.4
Stack Pointer (S)
The Stack Pointer (S) is an 8-bit register. This register is used to indicate the starting address of the storage (stack)
for registers to be saved during subroutine calls and interrupts.
This register specifies the lower 8 bits of the starting address. The higher 8 bits are determined by the content of the
stack page select bit. This bit is used to select whether the stack is allocated to either 0 page or 1 page. If 0 page is
selected, the higher 8 bits are set to 00h. If 1 page is selected, they are set to 01h.
2.5
Program Counter (PC)
The Program Counter (PC) is a 16-bit counter consisting of two 8-bit registers, PCH and PCL. It is used to indicate
the address of the next instruction to be executed.
2.6
Processor Status Register (PS Register)
The Processor Status Register (PS) is an 8-bit register consisting of five flags that indicate the MCU status after an
arithmetic operation, and three flags that determine the MCU operation.
After reset, all flags other than the I flag are undefined. Since the T flag and D flag directly affect arithmetic
operations, they should be initialized in the beginning of a program.
2.6.1
Bit 0: Carry Flag (C Flag)
The C flag retains a carry or borrow generated by the arithmetic logic unit (ALU) immediately after an
arithmetic operation. It can also be changed by a shift or rotate instruction.
2.6.2
Bit 1: Zero Flag (Z Flag)
The Z flag is set to 1 if an arithmetic operation or data transfer results in 0; otherwise it is set to 0.
2.6.3
Bit 2: Interrupt Disable Flag (I Flag)
The I flag disables all interrupts except for the interrupt generated by the BRK instruction. Interrupts are
disabled when this flag is set to 1, and are enabled when set to 0. The I flag is set to 1 when an interrupt request
is acknowledged.
2.6.4
Bit 3: Decimal Mode Flag (D Flag)
The D flag determines whether additions and subtractions are executed in binary or decimal. When the content
of the flag is 0, normal binary arithmetic is executed. When the content of the flag is 1, decimal arithmetic is
executed with 1 word as a 2-digit decimal number. Decimal correction is automatic, but only the ADC and SBC
instructions can be used for decimal arithmetic. When these instructions are used for decimal arithmetic, the
values of the Z, V, and N flags are invalid.