
R8C/2C Group, R8C/2D Group
Rev.2.00
Dec 05, 2007
REJ09B0339-0200
14.3.5
Timer Mode (Output Compare Function)
This function detects when the contents of the TRC register (counter) and the TRCGRj register (j = A, B, C, or
D) match (compare match). When a match occurs a signal is output from the TRCIOj pin at a given level. The
output compare function, or other mode or function, can be selected for each individual pin.
j = A, B, C, or D
Table 14.19
Specifications of Output Compare Function
Item
Specification
Count source
f1, f2, f4, f8, f32, fOCO40M, or external signal (rising edge) input to
TRCCLK pin
Count operation
Increment
Count period
The CCLR bit in the TRCCR1 register is set to 0 (free running
operation): 1/fk × 65,536
fk: Count source frequency
The CCLR bit in the TRCCR1 register is set to 1 (TRC register set to
0000h at TRCGRA compare match):
1/fk × (n + 1)
n: TRCGRA register setting value
Waveform output timing
Compare match
Count start condition
1 (count starts) is written to the TSTART bit in the TRCMR register.
Count stop condition
0 (count stops) is written to the TSTART bit in the TRCMR register.
The output compare output pin retains output level before count stops,
the TRC register retains a value before count stops.
Interrupt request generation
timing
Compare match (contents of registers TRC and TRCGRj match)
The TRC register overflows.
TRCIOA, TRCIOB, TRCIOC,
and TRCIOD pin functions
Programmable I/O port or output compare output (selectable individually
by pin)
INT0 pin function
Programmable I/O port, pulse output forced cutoff signal input, or INT0
interrupt input
Read from timer
The count value can be read by reading the TRC register.
Write to timer
The TRC register can be written to.
Select functions
Output compare output pin selected
One or more of pins TRCIOA, TRCIOB, TRCIOC, and TRCIOD
Compare match output level select
“L” output, “H” output, or toggle output
Initial output level select
Sets output level for period from count start to compare match
Timing for clearing the TRC register to 0000h
Overflow or compare match with the TRCGRA register
Can be used as an internal timer by disabling timer RC output