R01UH0040EJ0100 Rev.1.00
Page 227 of 1657
Sep 8, 2011
RX630 Group
8. Voltage Detection Circuit (LVD)
8.5
Interrupt and Reset from Voltage Monitor 1
Table 8.2 lists the procedures for setting bits related to the voltage monitor 1 interrupt and voltage monitor 1 reset so that
voltage monitoring operates.
Table 8.3 shows the procedure for setting bits related to the voltage monitor 1 interrupt and
voltage monitor 1 reset so that voltage monitoring stops.
Figure 8.5 shows an example of operations for a voltage
Furthermore, set the LVD1CR0.LVD1DFDIS bit to 1 (disabling the digital filter) if you intend to use the voltage monitor
1 circuit in software standby or deep software standby mode.
Note 1. Steps 1, 3, and 11 are not required if operation is with the setting to select the voltage monitor 1 interrupt (LVD1CR0.LVD1RI =
0) and operation can be restarted by simply changing the settings of the LVD1CR0.LVD1FSAMP[1:0] and LVD1DFDIS bits or of
the LVD1CR1.LVD1IDTSEL[1:0] bits, or if restarting is in a case where the settings related to the voltage-detection circuit were
not changed after monitoring was stopped. When changes are to be made and operation is with the setting to select the voltage
monitor 1 reset (LVD1CR0.LVD1RI = 1), proceed through all steps from 1 to 11.
Note 2. Executing steps 2 and 3 at the same time (with a single instruction) creates no problems.
Note 1. Steps 1 and 2 are not required when operation is with the setting to select the voltage monitor 1 interrupt (LVD1CR0.LVD1RI =
0) and, after it is stopped, operation is to be restarted by simply changing the settings of the LVD1CR0.LVD1FSAMP[1:0] and
LVD1DFDIS bits or the LVD1CR1.LVD1IDTSEL[1:0] bits, or when restarting is in a case where the settings related to the
voltage-detection circuit were not changed after monitoring was stopped. When changes are to be made and operation is with
Table 8.2
Procedures for Setting Bits Related to the Voltage Monitor 1 Interrupt and Voltage Monitor 1 Reset
so that Voltage Monitoring Operates
Step
When the Digital Filter is in Use
When the Digital Filter is Not in Use
Voltage Monitor 1 Interrupt
Voltage Monitor 1 Reset
Voltage Monitor 1 Interrupt
Voltage Monitor 1 Reset
Specify the detection voltage by setting the LVDLVLR.LVD1LVL[3:0] bits.
Select the sampling clock for the digital filter by setting the
LVD1CR0.LVD1FSAMP[1:0] bits.
Set the LVD1CR0.LVD1DFDIS bit to 1 (disabling the digital
filter).
3
Clear the LVD1CR0.LVD1RI
bit to 0 (selecting the voltage
monitor 1 interrupt).
Set the LVD1CR0.LVD1RI
bit to 1 (selecting the
voltage monitor 1 reset).
Select the type of reset
negation by setting the
LVD1CR0.LVD1RN bit.
Clear the LVD1CR0.LVD1RI
bit to 0 (selecting the voltage
monitor 1 interrupt).
Set the LVD1CR0.LVD1RI
bit to 1 (selecting the
voltage monitor 1 reset).
Select the type of the reset
negation by setting the
LVD1CR0.LVD1RN bit.
4
Select the timing of interrupt
requests by setting the
LVD1CR1.LVD1IDTSEL[1:0]
bits.
—
Select the timing of interrupt
requests by setting the
LVD1CR1.LVD1IDTSEL[1:0]
bits.
—
5
Set the LVD1CR0.LVD1CMPE bit to 1 (enabling output of the results of comparison by voltage monitor 1).
6
Wait for at least one cycle of the LOCO.
—
7
Clear the LVD1CR0.LVD1DFDIS bit to 0 (enabling the digital filter).
—
8
Wait for at least 2n + 3 cycles of the LOCO (where n = 1, 2, 4,
8, and the sampling clock for the digital filter is the LOCO
frequency-divided by n).
— (waiting is not required)
9
Clear the LVD1SR.LVD1DET
flag to 0.
—
Clear the LVD1SR.LVD1DET
flag to 0.
—
10
Set the LVD1CR0.LVD1RIE bit to 1 (enabling the voltage monitor 1 interrupt or reset).
Set the LVCMPCR.LVD1E bit to 1 (enabling the voltage detection 1 circuit).
Table 8.3
Procedures for Setting Bits Related to the Voltage Monitor 1 Interrupt and Voltage Monitor 1 Reset
to Stop Voltage Monitoring
Step
Setting Bits Related to the Voltage Monitor 1 Interrupt and Voltage Monitor 1 Reset to Stop Voltage Monitoring
Clear the LVCMPCR.LVD1E bit to 0 (disabling the voltage detection 1 circuit).
Wait for at least one cycle of the LOCO.
3
Clear the LVD1CR0.LVD1RIE bit to 0 (disabling the voltage monitor 1 interrupt or reset).
4
Clear the LVD1CR0.LVD1CMPE bit to 0 (disabling output of the results of comparison by voltage monitor 1).
5
Modify settings of bits related to the voltage detection circuit other than the LVCMPCR.LVD1E, LVD1CR0.LVD1CMPE, and
LVD1RIE bits.