
Section 12 DDR-SDRAM Interface (DDRIF)
Rev.1.00 Dec. 13, 2005 Page 428 of 1286
REJ09B0158-0100
3. The STR settings do not establish a relationship between the timing of the PREALL and REFA
commands that are issued by using SCR. A period of waiting that is suitable for the memory
unit must be inserted.
4. Make the SDRAM enter the self-refresh state by setting the DRE and RMODE bits in MIM to
1 (in this case, the value of the DCE bit should be left at 1).
5. The DDRIF automatically issues the self-refresh command and sets the CKE pin low. The
SDRAM then automatically enters the self-refresh mode.
6. Read the SELFS status bit in MIM to check whether or not the SDRAM has actually entered
the self-refresh mode.
[Return from self-refresh state]
1. Clear the RMODE and DRE bits in MIM to 0 to take the DDS-SDRAM out of the self-refresh
state.
2. Read the SELFS status bit in MIM to check whether or not the SDRAM has actually returned
from the self-refresh mode.
3. After allowing the time required for recovery from the self-refresh state, set registers so that
auto-refreshing is performed at an appropriate interval. After the recovery, wait for the time
required by the SDRAM before accessing the SDRAM (the time depends on the DDR-
SDRAM; for example, the requirements might be for 130 ns before issuing a command other
than a read command, and 200 clock cycles before issuing a read command).
4. When access becomes possible, use the SMS bits in SCR to issue the REFA (auto-refresh)
command so that all memory rows are refreshed.
5. Dummy read a byte from any SDRAM address.
6. Use the SMS bits in SCR to issue the PREALL (all-bank precharge) command.
7. Use the SMS bits in SCR to issue the REFA command. This operation is required to make the
delay adjustment unit in the DDRIF operate.
8. Set MIM so that the counter for the auto-refresh function starts counting and thus drives auto-
refreshing at a regular interval. After this, normal memory access is possible.
(2)
Power-Down Mode (when CKE Goes Low)
Clearing or setting the PCKE bit in MIM changes the level of the CKE pin, the SDRAM enters or
leaves the power-down mode. The SDRAM in this mode consumes less power.
Since the SDRAM is made to enter the power-down mode after each round of memory access and
has to leave the power-down mode before each round of memory access, an overhead of one cycle
of the MCLK is incurred in each case.