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参数资料
| 型号： | R75603BSA |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | 锁存器 |
| 英文描述： | AC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDFP20 |
| 封装： | CERAMIC, DFP-20 |
| 文件页数： | 1/10页 |
| 文件大小： | 224K |
| 代理商： | R75603BSA |
54AC377
54ACT377
Octal D Flip-Flop with Clock Enable
General Description
The ’AC/’ACT377 has eight edge-triggered, D-type flip-flops
with individual D inputs and Q outputs. The common buff-
ered Clock (CP) input loads all flip-flops simultaneously,
when the Clock Enable (CE) is LOW.
The register is fully edge-triggered. The state of each D in-
put, one setup time before the LOW-to-HIGH clock transi-
tion, is transferred to the corresponding flip-flop’s Q output.
The CE input must be stable only one setup time prior to the
LOW-to-HIGH clock transition for predictable operation.
Features
n ICC reduced by 50%
n Ideal for addressable register applications
n Clock enable for address and data synchronization
applications
n Eight edge-triggered D flip-flops
n Buffered common clock
n Outputs source/sink 24 mA
n See ’273 for master reset version
n See ’373 for transparent latch version
n See ’374 for TRI-STATE version
n ’ACT377 has TTL-compatible inputs
n Standard Microcircuit Drawing (SMD)
— ’AC377: 5962-88702
— ’ACT377: 5962-87697
Logic Symbols
Pin
Names
Description
D
0–D7
Data Inputs
CE
Clock Enable (Active LOW)
Q
0–Q7
Data Outputs
CP
Clock Pulse Input
TRI-STATE is a registered trademark of National Semiconductor Corporation.
FACT is a registered trademark of Fairchild Semiconductor Corporation.
DS100290-1
IEEE/IEC
DS100290-2
February 1999
54AC377
54ACT377
Octal
D
Flip-Flop
with
Clock
Enable
1999 National Semiconductor Corporation
DS100290
www.national.com
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