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参数资料
| 型号： | RDC-19229-423W |
| 厂商： | DATA DEVICE CORP |
| 元件分类： | 位置变换器 |
| 英文描述： | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CQCC44 |
| 文件页数： | 18/24页 |
| 文件大小： | 256K |
| 代理商： | RDC-19229-423W |
TTL/CMOS compatible
Logic 0 = 0.8 V max.
Logic 1 = 2.0 V min.
Loading =10 A max P.U. current
source to +5 V //5 pF max.
CMOS transient protected
Logic 0 inhibits; Data stable
within 0.3 s
Logic 0 enables; Data stable
within 150 ns
Logic 1 = High Impedance
Data High Z within 100 nS
Mode
B
A
Resolution
resolver
0
10 bits
"
0
1
12 bits
"
1
0
14 bits
"
1
16 bits
LVDT
-5 V
0
8 bits
"
0
-5 V
10 bits
"
1
-5 V
12 bits
"
-5 V
14 bits
10, 12, 14, or 16 parallel lines;
natural binary angle positive
logic (see TABLE 2)
0.25 to 0.75 s positive pulse
leading edge initiates counter
update.
Logic 1 at all 0s (ENL to -5 V);
LSBs are enabled
Logic 0 for BIT condition.
±100 LSBs of error typ. with a
filter of 500 S, or total Loss-of-
Signal (LOS)
50 pF +
Logic 0; 1 TTL load, 1.6 mA at
0.4 V max
Logic 1; 10 TTL loads, -0.4 mA
at 2.8 V min
Logic 0; 100 mV max driving CMOS
Logic 1; +5 V supply minus 100mV
min driving CMOS, High Z;
10 uA//5 pF max
3
Data Device Corporation
www.ddc-web.com
RDC-19220 SERIES
L-11/02-300
TABLE 1. RDC-19220 SPECIFICATIONS
These specifications apply over the rated power supply, temperature
and reference frequency ranges, and 10% signal amplitude variation
and harmonic distortion.
PARAMETER
UNIT
VALUE
RESOLUTION
Bits
10, 12, 14, or 16
ACCURACY
Min
4 or 2 + 1 LSB (note 3)
REPEATABILITY
LSB
1 max
DIFFERENTIAL LINEARITY
LSB
1 max in the 16th bit
REFERENCE
Type
Voltage:
differential
single ended
overload
Frequency
Input Impedance
VP-P
VP
V
Hz
Ohm
(+REF, -REF)
Differential
±10 max
±5 max
±25 continuous, 100 transient
DC to 40,000 (note 4)
10M min // 20 pf
SIGNAL INPUT
Type
Voltage: operating
overload
Input impedance
Vrms
V
Ohm
(+S, -S, SIN, +C, -C, COS)
Resolver, differential, groundbased
2 ±15%
±25 continuous
10M min//10 pf.
DIGITAL INPUT/OUTPUT
Logic Type
Inputs
Inhibit (INH)
Enable Bits 1 to 8 (EM)
Enable Bits 9 to 16 (EL)
Resolution and Mode
Control (A & B)
(see notes 1 and 2.)
Outputs
Parallel Data (1-16)
Converter Busy (CB)
Zero Index
Built-in-Test (BIT)
Drive Capability
(Zl)
Notes:
1. Unused data bits are set to logic “0.”
2. In LVDT mode, bit 16 is LSB for 14-bit resolution
or bit 12 is LSB for 10-bit resolution.
3. Accuracy in LVDT mode is 0.15% + 1 LSB of full scale.
4. See text, General Setup Considerations and Higher
Tracking Rates.
5. See text: General Setup Considerations for RDC19222.
TABLE 1. RDC-19220 SPECIFICATIONS (CONTD)
UNIT
PARAMETER
VALUE
DYNAMIC
CHARACTERISTICS
Resolution
Tracking Rate (max)(note 4)
Bandwidth(Closed Loop)
(max) (note 4)
Ka
A1
A2
A
B
Acceleration (1 LSB lag)
Settling Time(179° step)
bits
rps
Hz
1/sec2
1/sec
deg/s2
msec
(at maximum bandwidth)
10
12
14
16
1152
288
72
18
1200
600
300
5.7M
1.4M
360k
19.5
4.9
1.2
295k
2400
1200
600
1200
600
300
2M
500k
30k
2k
2
8
20
50
VELOCITY
CHARACTERISTICS
Polarity
Voltage Range(Full Scale)
Scale Factor Error
Scale Factor TC
Reversal Error
Linearity
Zero Offset
Zero Offset TC
Load
Noise
V
%
PPM/C
%
mv
V/C
k
(Vp/V)%
Positive for increasing angle
±4 (at nominal ps)
10 typ
20 max
100 typ
200 max
0.75 typ
1.3 max
0.25 typ
0.50 max
5 typ
10 max
15 typ
30max
8 max
1 typ
.125 min 2 max
POWER SUPPLIES
Nominal Voltage
Voltage Range
Max Volt. w/o Damage
Current
V
%
V
mA
(note 5)
+5
-5
± 5
+5, -20 (-4 V to -5.25 V)
+7
-7
14 typ, 22 max (each)
TEMPERATURE RANGE
Operating
-30X
-20X
-10X
Storage
plastic package
ceramic package
°C
0 to +70
-40 to +85
-55 to +125
-65 to +150
THERMAL RESISTANCE
Junction-to-Case (
θjc)
40-pin DDIP (plastic)
40-pin DDIP (ceramic)
44-pin J-Lead (plastic)
44-pin J-Lead (ceramic)
°C/W
92.4
4.6
72.6
2.4
PHYSICAL
CHARACTERISTICS
Size: 40-pin DDIP
44-pin J-Lead
in(mm)
2.0 x 0.6 x 0.2 (50.8 x 15.24 x 5.08)
0.690 square (17.526)
Weight:
40-pin DDIP
44-pin J-Lead
oz(g)
Plastic
Ceramic
0.21 (5.95)
0.24 (6.80)
0.08 (2.27)
0.065 (1.84)
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