参数资料
型号: RDC-632-A-H-3-R
厂商: DATA DEVICE CORP
元件分类: 位置变换器
英文描述: SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, DIP27
封装: 3.125 X 2.625 INCH, 0.430 INCH HEIGHT, MODULE-28/27
文件页数: 2/4页
文件大小: 464K
代理商: RDC-632-A-H-3-R
POWER SUPPLIES
The main power supplies can vary over the specified ranges with
no change in converter specifications, except for a proportional
change in maximum tracking rates.
When testing or evaluating the converters, it is advisable to limit
the current in each of the supplies. Set each current limit 50%
greater than the maximum current listed for that supply as listed
in TABLE 1.
TIMING
FIGURE 2 shows the converter timing waveforms. Whenever an
input angle change occurs, the converter changes the digital
angle in 1 LSB steps, and generates a Converter Busy (CB)
pulse.
The CB is a positive pulse 0.5 to 1.5 sec long.
2
ACCURACY
Standard Units
High Accuracy Option
SIGNAL AND
REFERENCE INPUT
Synchro Input
90V L-L, 400 Hz
(Option H)
90V L-L, 60 Hz
(Option I)
11.8V L-L, 400 Hz
(Option L)
Resolver Input
90V L-L, 400 Hz
(Option H)
26V L-L, 60 Hz
(Option M)
11.8V L-L, 400 Hz
(Option L)
DIGITAL
INPUT/OUTPUTS
Logic Type
Inhibit Input (INH)
Outputs
Type
10, 12, 14, (For 16
Consult Factory)
Parallel Data Bits
Converter Busy (CB)
Drive Capability
Built-In-Test (BIT)
(Special Order,
Consult Factory)
VELOCITY OUTPUT
(SPECIAL ORDER)
Polarity
Std. Voltage Range
(Full Scale)
For other Velocity
Characteristics
Consult Factory
REFERENCE INPUT
Options H, I
Options M, L
SDC-630
10 bits
±21 min
Signal
Frequency
Range
350-1000 Hz
47-1000 Hz
350-1000 Hz
TTL/CMOS Compatible
Logic “0” inhibits
Does not interrupt converter tracking.
TTL/CMOS
Natural Binary Angle; Positive logic
0.5 to 1.5 sec positive pulse.
Data changes on leading edge.
1 Std. TTL load
Positive Output for increasing angle
±4 Min (Other ranges available; Consult
Factory)
40-150 Vrms
10- 50 Vrms
Reference
Voltage
Range
±8.5 min
148 k
min
148 k
min
19 k
min
148 k
min
42 k
min
19 k
min
300 k
min
80 k
min
±5.3 min
±2.6 min
123 k
52 k
--
70 k
270 k
60 k
Signal Input
Impedance
(L-L Balanced, Resistive)
Reference Input Impedance
(Resistive)
SDC-632
12 bits
VALUE
SDC-634
14 bits
PARAMETER
RESOLUTION
TABLE 1. SDC-630/632/634 A/ST SPECIFICATIONS
ST
A*
* Transformer Isolated. Other voltages and frequencies available on
special order.
DATA
VALID
6.1
s MIN
DEPENDS ON d
θ
dt
0.5-1.5
s
.5
s
DATA
VALID
INHIBIT
(INH)
"1"
"0"
CONVERTER
BUSY (CB)
"1"
"0"
FIGURE 2. SDC-630/632/634* A/ST TIMING DIAGRAM
3.125 x 2.625 x 0.43 inches
(7.94 x 6.67 x 1.07 cm).
4 oz.
(113 gm.)
-55°C to +105°C
0°C to +70°C
-55°C to +125°C
PHYSICAL
CHARACTERISTICS
Size (Encapsulated
Module)
Weight
TEMPERATURE
RANGES
Operating
-1 Option
-3 Option
Storage
+ 5 V Supply
-11 to -16.5 V
-18 V
25 mA
-15 V Supply
+11 to +16.5 V
+18 V
20 mA
+15 V Supply
NOTE: These specifications apply over temperature range, power
supply range, reference frequency and amplitude range, ±10%
signal amplitude variation, and up to 10% harmonic distortion in
reference input.
TABLE 1. SDC-630/632/634 A/ST SPECIFICATIONS (CONTD)
POWER SUPPLIES
Nominal Voltage
Range
Maximum Voltage
Without Damage
Current (All)
PARAMETER
VALUE
+4.5 to +5.5
V
+7
10 mA
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