参数资料
型号: RDK-160
厂商: Power Integrations
文件页数: 7/18页
文件大小: 0K
描述: KIT REF DESIGN LINKSWITCH 2
应用说明: LinkSwitch-II Family, Appl Note AN-44
设计资源: RDR-157, 2.78W USB Charger Using LNK613DG
RDR-158, 5W Charger Using LNK616PG
RDR-159, 2.4W Charger Using LNK603DG
标准包装: 1
系列: LinkSwitch-II
主要目的: AC/DC,主面
输出及类型: 1,隔离
输入电压: 85 ~ 265VAC
稳压器拓扑结构: 回扫
板类型: 裸(未填充)和完全填充
已供物品: 3 块装有元件的板,3 裸板,文档,样品 IC,软件
已用 IC / 零件: LNK603,LNK604,LNK605,LNK606,LNK613,LNK614,LNK615,LNK616
相关产品: 732-2247-ND - TRANS OFF LINE POWER PI LNK616
732-2246-ND - TRANS OFF LINE POWER PI LNK613
732-2245-ND - TRANS OFF LINE POWER PI LNK603
732-2244-ND - TRANS OFF LINE POWER PI LNK605
LNK616GG-TL-ND - IC OFFLINE SWIT CV/CC HV 8SMD
LNK606GG-TL-ND - IC OFFLINE SWIT CV/CC HV 8SOIC
LNK615DG-TL-ND - IC OFFLINE SWIT CV/CC HV 8SOIC
LNK605DG-TL-ND - IC OFFLINE SWIT CV/CC HV 8SOIC
LNK614DG-TL-ND - IC OFFLINE SWIT CV/CC HV 8SOIC
LNK604DG-TL-ND - IC OFFLINE SWIT CV/CC HV 8SOIC
更多...
其它名称: 596-1235
LNK603-606/613-616
An overshoot
is acceptable
Negative ring may
increase output
ripple and/or
degrade output
regulation
Figure 6.
Desired Drain Voltage Waveform with Minimal Leakage
Ringing Undershoot.
Figure 7.
Undesirable Drain Voltage Waveform with Large Leakage
Ring Undershoot.
L1
1 mH
5
TI
EE13
10
820 pF 3
RF1
8.2 ?
2W
D1
1N4007
D2
1N4007
R2
470 k ?
R3
300 ?
C3
1 kV
8
2
D7
SL13
C7
470 μ F
10 V
1 k ?
DC
Output
AC
Input
C1
4.7 μ F
400 V
C2
4.7 μ F
400 V
D5
1N4007
4
D3
1N4007
D4
1N4007
D
LinkSwitch-II
U1
LNK613DG
FB
NC
R5
13 k ?
1%
BP
Figure 8.
LinkSwitch-II Flyback Power Supply Without Bias Supply.
S
C4
1 μ F
50 V
R6
9.31 k ?
1%
PI-5116-050808
BYPASS pin voltage. The parameters I S2 and V BP are provided in
the parameter table of the LinkSwitch-II data sheet. Diode D6 can
be any low cost diode such as FR102, 1N4148 or BAV19/20/21.
Quick Design Checklist
As with any power supply design, all LinkSwitch-II designs
should be verified on the bench to make sure that component
specifications are not exceeded under worst-case conditions.
The following minimum set of tests is strongly recommended:
1. Maximum drain voltage – Verify that peak V DS does not exceed
680 V at the highest input voltage and maximum output power.
2. Maximum drain current – At maximum ambient temperature,
maximum input voltage and maximum output load, verify
drain current waveforms at start-up for any signs of trans-
www.powerint.com
former saturation and excessive leading edge current spikes.
LinkSwitch-II has a leading edge blanking time of 170 ns to
prevent premature termination of the ON-cycle.
3. Thermal check – At maximum output power, both minimum
and maximum input voltage and maximum ambient tempera-
ture; verify that temperature specifications are not exceeded
for LinkSwitch-II, transformer, output diodes and output
capacitors. Enough thermal margin should be allowed for
part-to-part variation of the R DS(ON) of LinkSwitch-II, as specified
in the data sheet. To assure 10% CC tolerance a maximum
SOURCE pin temperature of 90 oC is recommended.
Design Tools
Up-to-date information on design tools can be found at the
Power Integrations web site: www.powerint.com
7
Rev. F 01/10
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