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参数资料
| 型号： | RJ80530GZ004512 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 1066 MHz, MICROPROCESSOR, PBGA479 |
| 封装： | MICRO, FCBGA-479 |
| 文件页数： | 10/96页 |
| 文件大小： | 2018K |
| 代理商： | RJ80530GZ004512 |
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Mobile Intel Pentium III Processor-M Features
R
18
Mobile Intel
Pentium III Processor-M Datasheet
2.2.5
HALT/Grant Snoop State
The processor will respond to snoop transactions on the system bus while in the Auto Halt or Quick
Start state. When a snoop transaction is presented on the system bus the processor will enter the
HALT/Grant Snoop state. The processor will remain in this state until the snoop has been serviced and
the system bus is quiet. After the snoop has been serviced, the processor will return to its previous
state. If the HALT/Grant Snoop state is entered from the Quick Start state, then the input signal
restrictions of the Quick Start state still apply in the HALT/Grant Snoop state, except for those signal
transitions that are required to perform the snoop.
2.2.6
Deep Sleep State
The Deep Sleep state is a very low power state the processor can enter while maintaining its context.
The Deep Sleep state is entered by stopping the BCLK and BCLK# inputs to the processor, or by
asserting the DPSLP# signal while it is in the Quick Start state. Note that either one of the methods
can be used to enter Deep Sleep but not both at the same time. When BCLK and BCLK# are stopped,
they must obey the DC levels specified in Table 30 and Table 31.
The processor will return to the Quick Start state from the Deep Sleep state when the BCLK and
BCLK# inputs are restarted or the DPSLP# signal is deasserted. Due to the PLL lock latency, there is a
delay of up to 30
sec after the clocks have started before this state transition happens. PICCLK may
be removed in the Deep Sleep state. PICCLK should be designed to turn on when BCLK and BCLK#
turn on or DPSLP# is deasserted when transitioning out of the Deep Sleep state.
2.2.7
Deeper Sleep State
The Deeper Sleep state is the lowest power state the processor can enter while maintaining its context.
It is functionally identical to the Deep Sleep State but at a lower voltage. The processor transitions to
the Deeper Sleep state from the Deep Sleep when the voltage regulator lowers the core voltage. The
VID signals for the Deeper Sleep State are supplied to the voltage regulator through control from the
I/O Controller Hub component. For more details on how this is implemented on the Mobile Intel
Pentium III Processor-M /Intel 830 platform, please refer to the Intel 82801CAM I/O Controller Hub
3 (ICH3-M) Datasheet and contact your Intel Field Sales Representative for details on Intel Mobile
Voltage Positioning – II (IMVP-II) implementation. For details on how Deeper Sleep is implemented
on 440MX chipset based systems using the Intel SpeedStep technology Control Logic Plus (ISSCL+)
component, please refer to the Mobile Intel Pentium III Processor-M/440MX Platform Design
Guide.
相关PDF资料 |
PDF描述 |
|---|---|
| RH80530GZ004512 | 32-BIT, 1066 MHz, MICROPROCESSOR, CPGA478 |
| RH80530GZ006512 | 32-BIT, 1133 MHz, MICROPROCESSOR, CPGA478 |
| RJ80530GZ001512 | 32-BIT, 1000 MHz, MICROPROCESSOR, PBGA479 |
| RJ80530LZ001512 | 32-BIT, 1000 MHz, MICROPROCESSOR, CPGA478 |
| RH80530GZ012512 | 32-BIT, 1266 MHz, MICROPROCESSOR, CPGA478 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| RJ80530GZ006512 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Intel 功能描述: |
| RJ80530GZ009512 | 制造商:Rochester Electronics LLC 功能描述:MOBILE P3, 1.20GHZ, 512K OD, 1.4V, USFC-BGA - Bulk |
| RJ80530GZ009512S L5CT | 制造商:Intel 功能描述:MPU Pentium |
| RJ80530GZ009512S L6AK | 制造商:Intel 功能描述:MPU Pentium |
| RJ80530KZ001512 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intel 功能描述: |
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