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参数资料
| 型号： | RS5C321B-E1 |
| 厂商： | RICOH COMPANY LTD |
| 元件分类： | 时钟/数据恢复及定时提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO8 |
| 封装： | 0.65 MM PITCH, SSOP-8 |
| 文件页数： | 10/33页 |
| 文件大小： | 286K |
| 代理商： | RS5C321B-E1 |
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RS5C321A/B
14
2. Write Data (For the RS5C321A)
Writing data to the real-time clock requires inputting setting data (control bits, address bits and data bits) to the
SIO pin and then establishing the write mode by using a control bit R/W in the same manner as in read operation.
Data bits
D3-D0: Inputs the data bits MSB to LSB in the addressing table describing the functions.
2.1 Write Cycle Flow
1. The CE pin is switched from “L” to “H”.
2. Four control bits (with the first bit ignored) and four write address bits are input from the SIO pin. At this time,
control bits R/W and DT are set equally to 0 while a control bit AD is set to 1. (see the SCLK 1A-8A)
3. Four control bits and four bits of data to be written are input in the descending order of their significance.
At this time, control bits R/W and AD are set equally to 0 while a control bit DT is set to 1. (see the clock 1B-8B)
4. When write cycle is continued, control bits and address bits are input at the shift clock pulse 1C and later in the
same manner as at the shift clock pulse 1A.
5. At the end of write operation, control bits R/W, AD, and DT are set equally to 0 (at the falling edge of shift clock
pulse 5A and later from the SCLK pin) or the CE pin is switched from “H” to “L” (after
tCEH from the falling edge
of the eighth shift clock pulse from the SCLK pin). Following on write cycle, read operation can be performed by
setting control bits in the read mode at the shift clock pulse 1C and later with the CE pin held at “H”.
1A
2A
3A
4A
5A
6A
7A
8A
1B
2B
3B
4B
5B
6B
7B
8B
1C
2C
3C
R/W
AD
DT
A3
A2
A1
A0
R/W
AD
DT
D3
D2
D1
D0
R/W
AD
*
CE
(Internal processing)
SCLK
Input to
SIO pin
Output
from
SIO pin
Writing to shift
register
Writing to address
register
Setting of
control bits
End of write
operation
Setting of
control bits
Control bits
Address bits
Control bits
Data bits
(Hiz)
*) In the above figure, the “*” mark indicates arbitrary data; and the diagonally shaded area of CE and SCLK indicates “H” or “L”.
*) Control bits and address bits are described in the previous section on read cycle.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| RS5C338A | 制造商:RICOH 制造商全称:RICOH electronics devices division 功能描述:3-WIRE SERIAL INTERFACE REAL-TIME CLOCK ICs WITH VOLTAGE MONITORING FUNCTION |
| RS5C338A-E2 | 制造商:RICOH 制造商全称:RICOH electronics devices division 功能描述:3-WIRE SERIAL INTERFACE REAL-TIME CLOCK ICs WITH VOLTAGE MONITORING FUNCTION |
| RS5C348A | 制造商:RICOH 制造商全称:RICOH electronics devices division 功能描述:4-WIRE SERIAL INTERFACE |
| RS5C348A-E2 | 制造商:RICOH 制造商全称:RICOH electronics devices division 功能描述:Real-Time Clock |
| RS5C348B | 制造商:RICOH 制造商全称:RICOH electronics devices division 功能描述:4-WIRE SERIAL INTERFACE |
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