参数资料
型号: S-1170B53UC-OUMTFU
元件分类: 固定正电压单路输出LDO稳压器
英文描述: 5.3 V FIXED POSITIVE LDO REGULATOR, 0.18 V DROPOUT, PDSO5
封装: HALOGEN FREE AND LEAD FREE, SOT-89, 5 PIN
文件页数: 7/30页
文件大小: 311K
代理商: S-1170B53UC-OUMTFU
HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.4.0_00
S-1170 Series
Seiko Instruments Inc.
15
3. Shutdown pin (ON/OFF pin)
This pin starts and stops the regulator.
When the ON/OFF pin is set to the shutdown level, the operation of all internal circuits stops, and the built-
in P-channel MOS FET output transistor between the VIN pin and VOUT pin is turned off to substantially
reduce the current consumption. The VOUT pin becomes the VSS level due to the internally divided
resistance of several hundreds k
Ω between the VOUT pin and VSS pin.
The structure of the ON/OFF pin is as shown in Figure 13. Since the ON/OFF pin is neither pulled down
nor pulled up internally, do not use it in the floating state. In addition, note that the current consumption
increases if a voltage of 0.3 V to VIN 0.3 V is applied to the ON/OFF pin. When the ON/OFF pin is not
used, connect it to the VSS pin if the logic type is “A” and to the VIN pin if it is “B”.
Table 6
Logic Type
ON/OFF Pin
Internal Circuits
VOUT Pin Voltage
Current Consumption
A
“L”: Power on
Operating
Set value
ISS1
A
“H”: Power off
Stopped
VSS level
ISS2
B
“L”: Power off
Stopped
VSS level
ISS2
B
“H”: Power on
Operating
Set value
ISS1
VSS
ON/OFF
VIN
Figure 13
相关PDF资料
PDF描述
S-1172B50-E6T1U 5 V FIXED POSITIVE LDO REGULATOR, 0.1 V DROPOUT, PDSO6
S-1172B50-U5T1U 5 V FIXED POSITIVE LDO REGULATOR, 0.1 V DROPOUT, PDSO5
S-1323B19NB-N8ETFU 1.9 V FIXED POSITIVE LDO REGULATOR, 0.65 V DROPOUT, PDSO4
S-1323B35NB-N8UTFU 3.5 V FIXED POSITIVE LDO REGULATOR, 0.65 V DROPOUT, PDSO4
S-1323B35PF-N8UTFU 3.5 V FIXED POSITIVE LDO REGULATOR, 0.65 V DROPOUT, PDSO4
相关代理商/技术参数
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