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参数资料
| 型号： | S-1172B27-E6T1U |
| 元件分类： | 固定正电压单路输出LDO稳压器 |
| 英文描述： | 2.7 V FIXED POSITIVE LDO REGULATOR, 0.1 V DROPOUT, PDSO6 |
| 封装： | HALOGEN FREE AND LEAD FREE, HSOP-6 |
| 文件页数： | 28/34页 |
| 文件大小： | 478K |
| 代理商： | S-1172B27-E6T1U |
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ProASIC3 DC and Switching Characteristics
2- 108
v1.3
Advance v0.3
M7 device information is new.
N/A
Table 2-4 ProASIC3 Globals/Spines/Rows by Device was updated to include the
number or rows in each top or bottom spine.
2-16
EXTFB was removed from Figure 2-24 ProASIC3E CCC Options.
2-24
The "PLL Macro" section was updated. EXTFB information was removed from
this section.
2-15
The CCC Output Peak-to-Peak Period Jitter FCCC_OUT was updated in Table 2-
11 ProASIC3 CCC/PLL Specification
2-29
EXTFB was removed from Figure 2-27 CCC/PLL Macro.
2-28
Table 2-13 ProASIC3 I/O Features was updated.
2-30
The "Hot-Swap Support" section was updated.
2-33
The "Cold-Sparing Support" section was updated.
2-34
"Electrostatic Discharge (ESD) Protection" section was updated.
2-35
The LVPECL specification in Table 2-43 I/O Hot-Swap and 5 V Input Tolerance
Capabilities in ProASIC3 Devices was updated.
2-64
In the Bank 1 area of Figure 2-72, VMV2 was changed to VMV1 and VCCIB2 was
changed to VCCIB1.
2-97
The VJTAG and I/O pin descriptions were updated in the "Pin Descriptions"
section.
2-50
The "JTAG Pins" section was updated.
2-51
"128-Bit AES Decryption" section was updated to include M7 device
information.
2-53
Table 3-6 was updated.
3-6
Table 3-7 was updated.
3-6
In Table 3-11, PAC4 was updated.
3-93-8
Table 3-20 was updated.
3-20
The note in Table 3-32 was updated.
3-27
All Timing Characteristics tables were updated from LVTTL to Register Delays
3-31 to
3-73
The Timing Characteristics for RAM4K9, RAM512X18, and FIFO were updated.
3-85 to
3-90
FTCKMAX was updated in Table 3-110.
3-97
Advance v0.2
Figure 2-11 was updated.
2-9
The "Clock Resources (VersaNets)" section was updated.
2-9
The "VersaNet Global Networks and Spine Access" section was updated.
2-9
The "PLL Macro" section was updated.
2-15
Figure 2-27 was updated.
2-28
Figure 2-20 was updated.
2-19
Table 2-5 was updated.
2-25
Table 2-6 was updated.
2-25
Previous Version
Changes in Current Version (v1.3)
Page
相关PDF资料 |
PDF描述 |
|---|---|
| S-1172B27-U5T1U | 2.7 V FIXED POSITIVE LDO REGULATOR, 0.1 V DROPOUT, PDSO5 |
| S-1172B29-E6T1U | 2.9 V FIXED POSITIVE LDO REGULATOR, 0.1 V DROPOUT, PDSO6 |
| S-1172B42-E6T1U | 4.2 V FIXED POSITIVE LDO REGULATOR, 0.1 V DROPOUT, PDSO6 |
| S-1172B42-U5T1U | 4.2 V FIXED POSITIVE LDO REGULATOR, 0.1 V DROPOUT, PDSO5 |
| S-1200B47-I6T2G | 4.7 V FIXED POSITIVE LDO REGULATOR, 0.19 V DROPOUT, PDSO6 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| S-1172B27-U5T1G | 制造商:SII 制造商全称:Seiko Instruments Inc 功能描述:HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR |
| S-1172B28-E6T1G | 制造商:SII 制造商全称:Seiko Instruments Inc 功能描述:HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR |
| S-1172B28-U5T1G | 功能描述:低压差稳压器 - LDO LINEAR LDO REG HI 70UA IQ 1000MA IOUT RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| S-1172B29-E6T1G | 制造商:SII 制造商全称:Seiko Instruments Inc 功能描述:HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR |
| S-1172B29-U5T1G | 制造商:SII 制造商全称:Seiko Instruments Inc 功能描述:HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR |
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