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参数资料
| 型号： | S-24CS02APH-TF-G |
| 元件分类： | PROM |
| 英文描述： | 256 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8 |
| 封装： | LEAD FREE, SNT-8 |
| 文件页数： | 4/47页 |
| 文件大小： | 531K |
| 代理商： | S-24CS02APH-TF-G |
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2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A
Rev.4.5_00
Seiko Instruments Inc.
12
5. Device Addressing
To start communication, the master device on the system generates a start condition to the bus line. Next,
the master device sends 7-bit device address and a 1-bit read / write instruction code on to the SDA bus.
The 4 most significant bits of the device address are called the "Device Code", and are fixed to "1010".
In S-24CS01A/02A, successive 3 bits are called the “Slave Address”. These 3 bits are used to identify a
device on the system bus and are compared with the predetermined value which is defined by the address
input pins (A0, A1 and A2). When the comparison result matches, the slave device responds with an
acknowledge during the 9th clock cycle.
In S-24CS04A, successive 2 bits are called the "Slave Address". These 2 bits are used to identify a device
on the system bus and are compared with the predetermined value which is defined by the address input
pins (A1 and A2). When the comparison result matches, the slave device responds with an acknowledge
during the 9th clock cycle.
The successive 1 bit (P0) is used to define a page address and choose the two 256-byte memory blocks
(Address 000h to 0FFh and 100h to 1FFh).
In S-24CS08A, successive 1 bit is called the “Slave Addrdess”. This 1 bit is used to identify a device on the
system bus and is compared with the predetermined value which is defined by the address input pin (A2).
When the comparison result matches, the slave device responds with an acknowledge during the 9th
clocks cycle.
The successive 2 bits (P1 and P0) are used to define a page address and choose the four 256-byte
memory blocks (Address 000h to 0FFh, 100h to 1FFh, 200h to 2FFh and 300h to 3FFh).
Slave Address
1
0
1
0
A2
A1
A0
R/W
Device Code
LSB
MSB
S-24CS01A/02A
Slave / Page
Address
Device Code
S-24CS04A
1
0
1
0
A2
A1
P0
R/W
1
0
1
0
A2
P1
P0
R/W
LSB
MSB
S-24CS08A
Figure 12 Device Address
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相关代理商/技术参数 |
参数描述 |
|---|---|
| S-24CS02APH-TFH-G | 制造商:SII 制造商全称:Seiko Instruments Inc 功能描述:2-WIRE CMOS SERIAL E2PROM |
| S-24CS04A | 制造商:SII 制造商全称:Seiko Instruments Inc 功能描述:2-WIRE CMOS SERIAL E2PROM |
| S-24CS04ADP | 功能描述:电可擦除可编程只读存储器 4K (512X8) 2-Wire RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| S-24CS04ADP-G | 功能描述:电可擦除可编程只读存储器 4K (512X8) 2-Wire RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| S-24CS04ADP-TB-G | 制造商:SII 制造商全称:Seiko Instruments Inc 功能描述:2-WIRE CMOS SERIAL E2PROM |
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