参数资料
型号: S-24CS02APH-TF-G
元件分类: PROM
英文描述: 256 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8
封装: LEAD FREE, SNT-8
文件页数: 9/47页
文件大小: 531K
代理商: S-24CS02APH-TF-G
2-WIRE CMOS SERIAL E2PROM
Rev.4.5_00
S-24CS01A/02A/04A/08A
Seiko Instruments Inc.
17
7. 2 Random Read
Random read is used to read the data at an arbitrary memory address.
A dummy write is performed to load the memory address into the address counter.
When the E
2PROM receives a 7-bit device address and a 1-bit read / write instruction code set to "0"
following a start condition, it responds with an acknowledge. The E
2PROM then receives an 8-bit word
address and responds with an acknowledge. The memory address is loaded to the address counter in the
E
2PROM by these operations. Reception of write data does not follow in a dummy write whereas reception
of write data follows in a byte write and in a page write.
Since the memory address is loaded into the memory address counter by dummy write, the master device
can read the data starting from the arbitrary memory address by transmitting a new start condition and
performing the same operation in the current address read.
That is, when the E
2PROM receives a 7-bit device address and a 1-bit read / write instruction code set to
"1", following a start condition signal, it responds with an acknowledge. Next, 8-bit data is transmitted from
the E
2PROM in synchronous to the SCL clock. The master device outputs stop condition not an
acknowledge , the reading of E
2PROM is ended.
SDA
LINE
S
T
A
R
T
W
R
I
T
E
DEVICE
ADDRESS
WORD
ADDRESS (n)
M
S
B
DUMMY WRITE
S
T
A
R
T
R
E
A
D
DEVICE
ADDRESS
M
S
B
A
C
K
L
S
B
NO ACK from
Master Device
S
T
O
P
ADR INC
DATA
A
C
K
A
C
K
L
S
B
R
/
W
R
/
W
Remark1. A1 is P1 in the S-24CS08A.
2. A0 is P0 in the S-24CS04A/08A.
3. W7 is optional in the S-24CS01A.
1 0 1 0 A2 A1 A0 0
W7W6W5W4W3W2W1W0
1 0 1 0 A2 A1 A0 1
D7 D6 D5 D4 D3 D2 D1 D0
Figure 17 Random Read
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