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参数资料
| 型号： | S-812C30AY-BG |
| 元件分类： | 固定正电压单路输出LDO稳压器 |
| 英文描述： | 3 V FIXED POSITIVE LDO REGULATOR, 0.41 V DROPOUT, PBCY3 |
| 封装： | LEAD FREE, TO-92, 3 PIN |
| 文件页数： | 4/39页 |
| 文件大小： | 690K |
| 代理商： | S-812C30AY-BG |
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12
Read Latency
The READ latency is the delay, in clock cycles, between the registration of a READ command and the
availability of the first piece of output data. The latency is set to 3 clocks.
If a READ command is registered at clock edge n, and the latency is 3 clocks, the data will be available
nominally coincident with clock edge n + 3.
Figure2:REQUIRED CAS LATENCIES
NOP
READ
NOP
COMMAND
CK
DQS
DQ
DON'T CARE
REQUIRED CAS LATENCIES
CL=3
Burst Length = 4 in the case shown
Shown with nominal tAC, tDQSCK, and tDQSQ
Operating Mode
The normal operating mode is selected by issuing a Mode Register Set command with bits A7-A10 each set
to zero, and bits A0-A6 set to the desired values. A DLL reset is inititated by issuing a Mode Register Set
command with bits A7 and A9-A10 each set to zero, bit A8 set to one, and bits A0-A6 set to the desired
values. A Mode Register Set command issued to reset the DLL should always be followed by a Mode
Register Set command to select normal operating mode.
All other combinations of values for A7-A10 are reserved for future use and/or test modes. Test modes and
reserved states should not be used because unknown operation or incompatibility with future versions may
result.
DLL Enable/Disable
The DLL must be enabled for normal operation. DLL enable isrequiredduringpower-upinitialization,andupon
returning to normal operation after having disabled the DLL for the purpose of debug or evaluation (upon
exiting Self Refresh Mode, the DLL is enabled automatically). Any time the DLL is enabled, 200 clock cycles
must occur before a READ command can be issued.
Output Drive Strength
Programable DS0
相关PDF资料 |
PDF描述 |
|---|---|
| S-812C30AY-ZG | 3 V FIXED POSITIVE LDO REGULATOR, 0.41 V DROPOUT, PBCY3 |
| S-812C30BPI-C4KTFGG | 3 V FIXED POSITIVE LDO REGULATOR, 0.41 V DROPOUT, PDSO6 |
| S-812C39AUA-C2T-T2G | 3.9 V FIXED POSITIVE LDO REGULATOR, 0.35 V DROPOUT, PSSO3 |
| S-812C39AY-BG | 3.9 V FIXED POSITIVE LDO REGULATOR, 0.35 V DROPOUT, PBCY3 |
| S-812C39BMC-C4T-T2G | 3.9 V FIXED POSITIVE LDO REGULATOR, 0.35 V DROPOUT, PDSO5 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| S-812C30AY-B-G | 制造商:Seiko Instruments Inc (SII) 功能描述:LDO Regulator Pos 3V 0.05A 3-Pin TO-92B Bulk |
| S-812C30AY-T-G | 制造商:Seiko Instruments Inc (SII) 功能描述:REG STD LIN FIX POS 3V 0.05A 3PIN TO-92A - Tape and Reel |
| S-812C30AY-X | 制造商:SII 制造商全称:Seiko Instruments Inc 功能描述:HIGH OPERATING VOLTAGE CMOS VOLTAGE REGULATOR |
| S-812C30AY-X-G | 制造商:SII 制造商全称:Seiko Instruments Inc 功能描述:HIGH OPERATING VOLTAGE CMOS VOLTAGE REGULATOR |
| S-812C30BMC-C4K-T2 | 制造商:SII 制造商全称:Seiko Instruments Inc 功能描述:HIGH OPERATING VOLTAGE CMOS VOLTAGE REGULATOR |
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