参数资料
型号: S-8333ACIC-T8T1G
元件分类: 稳压器
英文描述: 0.16 A SWITCHING CONTROLLER, 1133 kHz SWITCHING FREQ-MAX, PDSO8
封装: LEAD FREE, TSSOP-8
文件页数: 3/43页
文件大小: 588K
代理商: S-8333ACIC-T8T1G
STEP-UP, FOR LCD BIAS SUPPLY, 1-CHANNEL, PWM CONTROL SWITCHING REGULATOR CONTROLLER
Rev.2.3_00
S-8333 Series
Seiko Instruments Inc.
11
3. Timer latch short-circuit protection function
This IC has a timer latch short-circuit protection circuit that stops the switching operation when the output voltage
drops for a specific time due to output short-circuiting. A capacitor (CSP) that is used to set the delay time of this
short-circuit protection circuit can be connected to the CSP pin.
This IC operates at the maximum duty ratio if the output voltage drops due to output short-circuiting. At the
maximum duty ratio, constant-current charging of CSP starts. If this status lasts for a short-circuit protection
delay time and the CSP pin voltage rises above the reference voltage, the latch mode is set. Note that the latch
mode is different from the shutdown status in that the switching operation is stopped but the internal circuitry
operates normally.
To reset the latch operation to protect the IC from short-circuiting, lower VIN than the UVLO detection voltage.
The latch mode within the short-circuit protection delay time is reset by decreasing VIN to 1.0 V (Typ.) or lower.
Note that the mode is not reset even if the VIN is lowered to the UVLO detection voltage (refer to Figure 9).
Input voltage
(VIN)
Output load
CSP pin voltage
(VCSP)
Latch mode
Short-circuit status
50 ms (CSP
= 0.1 F)
Normal
status
Short-circuit
protection time
Latch
period
Reset period
Short-circuit
protection time
Short-circuit
protection time
UVLO release
UVLO detection
1.0 V
Reference
voltage
Figure 9
4. UVLO function
This IC includes a UVLO (under-voltage lockout) circuit to prevent the IC from malfunctioning due to a transient
status when power is applied or a momentary drop of the power supply voltage. When UVLO is in the detection
state, switching is stopped and the external FET is held in the off status. Once UVLO enters the detection state,
the soft-start function is reset.
Note that the other internal circuits operate normally and that the status is different from the power-off status.
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