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参数资料
| 型号： | S-93C56BD0I-I8T1G |
| 元件分类： | PROM |
| 英文描述： | 128 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 封装： | LEAD FREE, SNT-8 |
| 文件页数： | 6/48页 |
| 文件大小： | 803K |
| 代理商： | S-93C56BD0I-I8T1G |
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CMOS SERIAL E2PROM
S-93C46B/56B/66B
Rev.5.0_00
Seiko Instruments Inc.
14
4. Writing (WRITE, ERASE, WRAL, ERAL)
A write operation includes four write instructions: data write (WRITE), data erase (ERASE), chip write
(WRAL), and chip erase (ERAL).
A write instruction (WRITE, ERASE, WRAL, ERAL) starts a write operation to the memory cell when a
low level is input to CS after a specified number of clocks have been input. The SK and DI inputs are
invalid during the write period, so do not input an instruction.
Input an instruction while the output status of the DO pin is high or high impedance (Hi-Z).
A write operation is valid only in program enable mode (refer to “5. Write enable (EWEN) and write
disable (EWDS)
”).
4. 1 Verify operation
A write operation executed by any instruction is completed within 8 ms (write time tPR: typically 4
ms), so if the completion of the write operation is recognized, the write cycle can be minimized. A
sequential operation to confirm the status of a write operation is called a verify operation.
(1) Operation
After the write operation has started (CS
= low), the status of the write operation can be verified
by confirming the output status of the DO pin by inputting a high level to CS again. This
sequence is called a verify operation, and the period that a high level is input to the CS pin after
the write operation has started is called the verify operation period.
The relationship between the output status of the DO pin and the write operation during the
verify operation period is as follows.
DO pin = low: Writing in progress (busy)
DO pin = high: Writing completed (ready)
(2) Operation example
There are two methods to perform a verify operation: Waiting for a change in the output status
of the DO pin while keeping CS high, or suspending the verify operation (CS
= low) once and
then performing it again to verify the output status of the DO pin. The latter method allows the
CPU to perform other processing during the wait period, allowing an efficient system to be
designed.
Caution 1. Input a low level to the DI pin during a verify operation.
2. If a high level is input to the DI pin at the rise of SK when the output status of the DO
pin is high, the S-93C46B/56B/66B latches the instruction assuming that a start bit has
been input. In this case, note that the DO pin immediately enters a high-impedance
(Hi-Z) state.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| S-93C56BD0I-I8T1U | 制造商:SII 制造商全称:Seiko Instruments Inc 功能描述:3-WIRE SERIAL E2PROM |
| S-93C56BD0I-J8T1 | 制造商:Seiko Instruments Inc (SII) 功能描述: |
| S-93C56BD0I-J8T1G | 功能描述:电可擦除可编程只读存储器 2K (128X16) Hi-Speed RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| S-93C56BD0I-J8T1U | 制造商:SII 制造商全称:Seiko Instruments Inc 功能描述:3-WIRE SERIAL E2PROM |
| S-93C56BD0I-J8T2G | 制造商:SII 制造商全称:Seiko Instruments Inc 功能描述:CMOS SERIAL E2PROM |
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