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参数资料
| 型号： | S29GL256N10FAI010 |
| 厂商： | SPANSION LLC |
| 元件分类： | PROM |
| 英文描述： | MirrorBit Flash Family |
| 中文描述： | 16M X 16 FLASH 3V PROM, 100 ns, PBGA64 |
| 封装： | 13 X 11 MM, FBGA-64 |
| 文件页数： | 8/95页 |
| 文件大小： | 3781K |
| 代理商： | S29GL256N10FAI010 |
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16
S29GL-N
S29GL-N_00_B8 May 30, 2008
Da ta
Sh e e t
on the device address inputs produce valid data on the device data outputs. The device remains enabled for
read access until the command register contents are altered.
See Reading Array Data on page 48 for more information. Refer to the AC Read-Only Operations table for
timing specifications and to Figure 15.1 on page 72 for the timing diagram. Refer to the DC Characteristics
table for the active current specification on reading array data.
7.3.1
Page Mode Read
The device is capable of fast page mode read and is compatible with the page mode Mask ROM read
operation. This mode provides faster read access speed for random locations within a page. The page size of
the device is 8 words/16 bytes. The appropriate page is selected by the higher address bits A(max)–A3.
Address bits A2–A0 in word mode (A2–A-1 in byte mode) determine the specific word within a page. This is
an asynchronous operation; the microprocessor supplies the specific word location.
The random or initial page access is equal to tACC or tCE and subsequent page read accesses (as long as the
locations specified by the microprocessor falls within that page) is equivalent to tPACC. When CE# is de-
asserted and reasserted for a subsequent access, the access time is tACC or tCE. Fast page mode accesses
are obtained by keeping the “read-page addresses” constant and changing the “intra-read page” addresses.
7.4
Writing Commands/Command Sequences
To write a command or command sequence (which includes programming data to the device and erasing
sectors of memory), the system must drive WE# and CE# to VIL, and OE# to VIH.
The device features an Unlock Bypass mode to facilitate faster programming. Once the device enters the
Unlock Bypass mode, only two write cycles are required to program a word or byte, instead of four. The
“Word Program Command Sequence” section has details on programming data to the device using both
standard and Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sectors, or the entire device. Table 7.2 on page 18,
Table 7.4 on page 35, and Table 7.5 on page 38 indicate the address space that each sector occupies.
Refer to the DC Characteristics table for the active current specification for the write mode. The AC
Characteristics section contains timing specification tables and timing diagrams for write operations.
7.4.1
Write Buffer
Write Buffer Programming allows the system write to a maximum of 16 words/32 bytes in one programming
operation. This results in faster effective programming time than the standard programming algorithms. See
Write Buffer on page 16 for more information.
7.4.2
Accelerated Program Operation
The device offers accelerated program operations through the ACC function. This is one of two functions
provided by the WP#/ACC pin. This function is primarily intended to allow faster manufacturing throughput at
the factory.
If the system asserts VHH on this pin, the device automatically enters the aforementioned Unlock Bypass
mode, temporarily unprotects any protected sector groups, and uses the higher voltage on the pin to reduce
the time required for program operations. The system would use a two-cycle program command sequence as
required by the Unlock Bypass mode. Removing VHH from the WP#/ACC pin returns the device to normal
operation. Note that the WP#/ACC pin must not be at VHH for operations other than accelerated
programming, or device damage may result. WP# has an internal pull-up; when unconnected, WP# is at VIH.
7.4.3
Autoselect Functions
If the system writes the autoselect command sequence, the device enters the autoselect mode. The system
can then read autoselect codes from the internal register (which is separate from the memory array) on DQ7–
DQ0. Standard read cycle timings apply in this mode. Refer to the Autoselect Mode on page 38 and
Autoselect Command Sequence on page 49, for more information.
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| S29JL032H90TAI223 | 2M X 16 FLASH 3V PROM, 90 ns, PDSO48 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| S29GL256N10FAI020 | 制造商:Spansion 功能描述: |
| S29GL256N10FFI010 | 制造商:Spansion 功能描述:NOR Flash Parallel 3V/3.3V 256Mbit 32M/16M x 8bit/16bit 100ns 64-Pin Fortified BGA Tray 制造商:Spansion 功能描述:MIRRORBIT FLASH 256MB SMD 29LV256 |
| S29GL256N10FFI012 | 制造商:Spansion 功能描述:Flash - NOR IC |
| S29GL256N10FFI020 | 制造商:Spansion 功能描述:NOR Flash Parallel 3V/3.3V 256Mbit 32M/16M x 8bit/16bit 100ns 64-Pin Fortified BGA Tray 制造商:Spansion 功能描述:MIRRORBIT FLASH 256MB SMD 29LV256 |
| S29GL256N10TFI010 | 功能描述:IC FLASH 制造商:cypress semiconductor corp 系列:GL-N 包装:托盘 零件状态:在售 存储器类型:非易失 存储器格式:闪存 技术:FLASH - NOR 存储容量:256Mb （32M x 8，16M x 16） 写周期时间 - 字，页:100ns 访问时间:100ns 存储器接口:并联 电压 - 电源:2.7 V ~ 3.6 V 工作温度:-40°C ~ 85°C（TA） 安装类型:表面贴装 封装/外壳:56-TFSOP（0.724"，18.40mm 宽） 供应商器件封装:56-TSOP 标准包装:91 |
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