- 您现在的位置：买卖IC网 > PDF目录270895 > S29WS064N0PBAW010 (SPANSION LLC) 256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY PDF资料下载
参数资料
| 型号： | S29WS064N0PBAW010 |
| 厂商： | SPANSION LLC |
| 元件分类： | PROM |
| 英文描述： | 256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY |
| 中文描述： | 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA80 |
| 封装： | 9 X 7 MM, LEAD FREE, PLASTIC, FBGA-80 |
| 文件页数： | 16/95页 |
| 文件大小： | 1745K |
| 代理商： | S29WS064N0PBAW010 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页当前第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页
October 29, 2004 S29WSxxxN_00_F0
23
Pre l i m i n a r y
Figure 7.2. Synchronous Read
7.3.1 Continuous Burst Read Mode
In the continuous burst read mode, the device outputs sequential burst data from the starting
address given and then wrap around to address 000000h when it reaches the highest addres-
sable memory location. The burst read mode will continue until the system drives CE# high,
RESET# low, or AVD# low in conjunction with a new address.
If the address being read crosses a 128-word line boundary and the subsequent word line is
not programming or erasing, additional latency cycles are required as shown in Tables 7.10–
If the address crosses a bank boundary while the subsequent bank is programming or eras-
ing, the device will provide read status information and the clock will be ignored. Upon
completion of status read or program or erase operation, the host can restart a burst read
operation using a new address and AVD# pulse.
Write Unlock Cycles:
Address 555h, Data AAh
Address 2AAh, Data 55h
Write Set Configuration Register
Command and Settings:
Address 555h, Data D0h
Address X00h, Data CR
Load Initial Address
Address = RA
Read Initial Data
RD = DQ[15:0]
Read Next Data
RD = DQ[15:0]
Wait tIACC +
Programmable Wait State Setting
Wait X Clocks:
Additional Latency Due to Starting
Address, Clock Frequency, and
Boundary Crossing
End of Data?
Yes
Crossing
Boundary?
No
Yes
Completed
Delay X Clocks
Unlock Cycle 1
Unlock Cycle 2
RA = Read Address
RD = Read Data
Command Cycle
CR = Configuration Register Bits CR15-CR0
CR13-CR11 sets initial access time
(from address latched to
valid data) from 2 to 7 clock cycles
number of clocks required for X.
相关PDF资料 |
PDF描述 |
|---|---|
| S29GL256N90FFI013 | MirrorBit Flash Family |
| S29GL256N10FFI013 | MirrorBit Flash Family |
| S29AL016M90FFI013 | 16 MEGABIT (2M X 8 BIT / I M X 16 BIT) 3.0 VOLT ONLY BOOT SECTOR FLASH MEMORY |
| S29AL016M10FFI013 | 16 MEGABIT (2M X 8 BIT / I M X 16 BIT) 3.0 VOLT ONLY BOOT SECTOR FLASH MEMORY |
| S29GL256N80FFI020 | MirrorBit Flash Family |
相关代理商/技术参数 |
参数描述 |
|---|---|
| S29WS064N0PBAW011 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY |
| S29WS064N0PBAW012 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:256/128/64 Megabit (16/8/4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
| S29WS064N0PBAW013 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY |
| S29WS064N0PBAW110 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY |
| S29WS064N0PBAW111 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY |
发布紧急采购，3分钟左右您将得到回复。