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参数资料
| 型号： | S29WS128N0LBFI111 |
| 厂商： | Spansion Inc. |
| 英文描述： | 256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY |
| 中文描述： | 256/128/64兆位的CMOS 1.8伏只有同时读/写突发模式闪存 |
| 文件页数： | 46/99页 |
| 文件大小： | 1091K |
| 代理商： | S29WS128N0LBFI111 |
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48
S29WS-N_00_G0 January 25, 2005
Adva nce
Information
7.9
Hardware Reset
The RESET# input provides a hardware method of resetting the device to reading array data.
When RESET# is driven low for at least a period of tRP, the device immediately terminates any
operation in progress, tristates all outputs, resets the configuration register, and ignores all read/
write commands for the duration of the RESET# pulse. The device also resets the internal state
machine to reading array data.
To ensure data integrity the operation that was interrupted should be reinitiated once the device
is ready to accept another command sequence.
When RESET# is held at VSS, the device draws CMOS standby current (ICC4). If RESET# is held
at VIL, but not at VSS, the standby current is greater.
RESET# may be tied to the system reset circuitry which enables the system to read the boot-up
firmware from the Flash memory upon a system reset.
7.10 Software Reset
Software reset is part of the command set (see Table 12.1) that also returns the device to array
read mode and must be used for the following conditions:
1.
to exit Autoselect mode
2.
when DQ5 goes high during write status operation that indicates program or erase cycle
was not successfully completed
3.
exit sector lock/unlock operation.
4.
to return to erase-suspend-read mode if the device was previously in Erase Suspend
mode.
5.
after any aborted operations
Note: Base = Base Address.
The following is a C source code example of using the reset function. Refer to the Spansion
Low Level Driver User’s Guide (available on www.amd.com and www.fujitsu.com) for general
information on Spansion Flash memory software development guidelines.
/* Example: Reset (software reset of Flash state machine) */
*( (UINT16 *)base_addr + 0x000 ) = 0x00F0;
The following are additional points to consider when using the reset command:
This command resets the banks to the read and address bits are ignored.
Reset commands are ignored once erasure has begun until the operation is complete.
Once programming begins, the device ignores reset commands until the operation is
complete
The reset command may be written between the cycles in a program command sequence
before programming begins (prior to the third cycle). This resets the bank to which the
system was writing to the read mode.
Software Functions and Sample Code
Table 7.25. Reset
(LLD Function = lld_ResetCmd)
Cycle
Operation
Byte Address
Word Address
Data
Reset Command
Write
Base + xxxh
00F0h
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相关代理商/技术参数 |
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| S29WS128N0LBFI112 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY |
| S29WS128N0LBFI113 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY |
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| S29WS128N0LBFW011 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY |
| S29WS128N0LBFW012 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY |
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