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参数资料
| 型号： | S71WS512N80BAEZZ3 |
| 厂商： | Spansion Inc. |
| 英文描述： | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| 中文描述： | 堆叠式多芯片产品（MCP）的闪存和移动存储芯片的CMOS 1.8伏特 |
| 文件页数： | 14/142页 |
| 文件大小： | 1996K |
| 代理商： | S71WS512N80BAEZZ3 |
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14
S29WSxxxN MirrorBit Flash Family For Multi-chip Products (MCP)
S71WS512NE0BFWZZ_00_ A1 June 28, 2004
A d v a n c e I n f o r m a t i o n
S29WSxxxN MirrorBit Flash Family
For Multi-chip Products (MCP)
S29WS256N
256 Megabit (16 M x 16-Bit) CMOS 1.8 Volt-only
Simultaneous Read/Write, Burst Mode Flash Memory
Distinctive Characteristics
Architectural Advantages
Single 1.8 volt read, program and erase (1.65 to
1.95 volt)
Manufactured on 110 nm MirrorBit
TM
process
technology
Simultaneous Read/Write operation
— Data can be continuously read from one bank while
executing erase/program functions in another bank
— Zero latency between read and write operations
— Sixteen bank architecture: Each bank consists of
16Mb (WS256N)
Programable Burst Interface
— 2 Modes of Burst Read Operation
— Linear Burst: 32, 16, and 8 words with or without
wrap-around
— Continuous Sequential Burst
SecSi
TM
(Secured Silicon) Sector region
— 256 words accessible through a command
sequence, 128 words for the Factory SecSi Sector
and 128 words for the Customer SecSi Sector.
Sector Architecture
— S29WS256N: Eight 16 Kword sectors and two-
hundred-fifty-four 64 Kword sectors
— Banks 0 and 15 each contain 16 Kword sectors and
64 Kword sectors; Other banks each contain 64
Kword sectors
— Eight 16 Kword boot sectors, four at the top of the
address range, and four at the bottom of the
address range
100,000 erase cycles per sector typical
20-year data retention typical
Performance Characteristics
Read access times at 66/54 MHz @ 1.8V V
IO
(1.65
- 1.95V)
— Burst access times of 11.2/13.5 ns for 1.8V V
IO
(@
30 pF at industrial temperature range)
— Synchronous initial latency of 69/69 ns for 1.8V V
IO
(@ 30 pF at industrial temperature range)
— Asynchronous random access times of 70/70 ns for
1.8V V
IO
(@ 30 pF at industrial temperature range)
High Performance
— Typical word programming time of < 40 μs
— Typical effective word programming time of <9.4 μs
utilizing a 32-Word Write Buffer at Vcc Level
— Typical effective word programming time of <4 μs
utilizing a 32-Word Write Buffer at ACC Level
— Typical sector erase time of <150 ms for both 16
Kword sectors and <400 ms sector erase time for 64
Kword sectors
Power dissipation (typical values, C
L
= 30 pF) @
66 MHz
— Continuous Burst Mode Read: <28 mA
— Simultaneous Operation: <50 mA
— Program: <35 mA
— Erase: <35 mA
— Standby mode: <20 μA
Hardware Features
Sector Protection
— Write protect (WP#) function allows protection of
eight outermost boot sectors, four at top and four at
bottom of memory, regardless of sector protect
status
Handshaking feature available
— Provides host system with minimum possible latency
by monitoring RDY
Hardware reset input (RESET#)
— Hardware method to reset the device for reading
array data
Boot Option
— Dual Boot
CMOS compatible inputs, CMOS compatible
outputs
Low V
CC
write inhibit
Security Features
Advanced Sector Protection consists of the two
following modes of operation
Persistent Sector Protection
— A command sector protection method to lock
combinations of individual sectors to prevent
program or erase operations within that sector
— Sectors can be locked and unlocked in-system at V
CC
level
Password Sector Protection
— A sophisticated sector protection method to lock
combinations of individual sectors to prevent
program or erase operations within that sector using
a user-defined 64-bit password
Software Features
Supports Common Flash Memory Interface (CFI)
Software command set compatible with JEDEC
42.4 standards
Data# Polling and toggle bits
— Provides a software method of detecting program
and erase operation completion
相关PDF资料 |
PDF描述 |
|---|---|
| S71WS512N80BAIZZ0 | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BAIZZ2 | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BAIZZ3 | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BAWZZ0 | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BAWZZ2 | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
相关代理商/技术参数 |
参数描述 |
|---|---|
| S71WS512N80BAIZZ0 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BAIZZ2 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BAIZZ3 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BAWZZ0 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BAWZZ2 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
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