8XC51FX
PROGRAMMING THE EPROM/OTP
To be programmed, the part must be running with a
4 to 6 MHz oscillator. (The reason the oscillator
needs to be running is that the internal bus is being
used to transfer address and program data to appro-
priate internal EPROM locations.) The address of an
EPROM location to be programmed is applied to
Port 1 and pins P2.0 - P2.4 of Port 2, while the code
byte to be programmed into that location is applied
to Port 0. The other Port 2 and 3 pins, RST PSEN,
and EA/V PP should be held at the ``Program'' levels
indicated in Table 4. ALE/PROG is pulsed low to
program the code byte into the addressed EPROM
location. The setup is shown in Figure 10.
Normally EA/V PP is held at logic high until just be-
fore ALE/PROG is to be pulsed. Then EA/V PP is
raised to VPP, ALE/PROG is pulsed low, and then
EA/V PP is returned to a valid high voltage. The volt-
age on the EA/V PP pin must be at the valid EA/V PP
high level before a verify is attempted. Waveforms
and detailed timing specifications are shown in later
sections of this data sheet.
NOTE
:
EA/V PP pin must not be allowed to go above the
maximum specified VPP level for any amount of
time. Even a narrow glitch above that voltage lev-
el can cause permanent damage to the device.
The VPP source should be well regulated and free
of glitches.
Table 4. EPROM Programming Modes
Mode
RST
PSEN
ALE/
EA/
P2.6
P2.7
P3.3
P3.6
P3.7
PROG
VPP
Program Code Data
H
L
12.75V
L
H
Verify Code Data
H
L
H
L
H
Program Encryption
H
L
12.75V
L
H
L
H
Array Address 0±3FH
Program Lock
Bit 1
H
L
12.75V
H
Bits
Bit 2
H
L
12.75V
H
L
Bit 3
H
L
12.75V
H
L
H
L
Read Signature Byte
H
L
H
L
272322±20
See Table 4 for proper input on these pins
Figure 10. Programming the EPROM
16