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| 型号： | SAA7706H/N107,557 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 16/52页 |
| 文件大小： | 0K |
| 描述： | IC CAR RADIO DSP 80-QFP |
| 标准包装： | 330 |
| 类型： | 汽车信号处理器 |
| 接口： | I²C，I²:S，LSB，SPDIF |
| 电压 - 输入/输出： | 3.30V |
| 电压 - 核心： | 3.30V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 80-BQFP |
| 供应商设备封装： | 80-QFP（14x20） |
| 包装： | 托盘 |
| 其它名称： | 935267098557 SAA7706H/N107 SAA7706H/N107-ND |
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2001 Mar 05
23
Philips Semiconductors
Product specication
Car radio Digital Signal Processor (DSP)
SAA7706H
handbook, full pagewidth
MGT470
AGC
Gm
Rbias
C2
C1
C3
clock to circuit
on-chip
off-chip
OSC_IN
slave input 3.3 V(p-p)
OSC_OUT
63
64
VDD(OSC)
0.5VDD(OSC)
VSS(OSC)
65
62
Fig.14 Block diagram of the oscillator in slave mode.
8.8.1
SUPPLY OF THE CRYSTAL OSCILLATOR
The power supply connections of the oscillator are
separated from the other supply lines. This is done to
minimize the feedback from the ground bounce of the chip
to the oscillator circuit. Pin VSS(OSC) is used as ground
supply and pin VDD(OSC) as positive supply. A series
resistor plus capacitance is required for proper operating
on pin VDD(OSC), see Figs 25 and 26. See also important
remark in Section 8.10.
8.9
The phase-locked loop circuit to generate the
DSPs and other clocks
There are several reasons why a PLL circuit is used to
generate the clock for the DSPs:
The PLL makes it possible to switch in the rare cases
that tuning on a multiple of the DSP clock frequency
occurs to a slightly higher frequency for the clock of the
DSP. In this way an undisturbed reception with respect
to the DSP clock frequency is possible.
Crystals for the crystal oscillator in the range of twice the
required DSP clock frequency, so approximately
100 MHz, are always third overtone crystals and must
also be manufactured on customer demand. This makes
these crystals expensive. The PLL1 enables the use of
a crystal running in the fundamental mode and also a
general available crystal can be chosen. For this circuit
a 256
× 44.1 kHz = 11.2896 MHz crystal is chosen. This
type of crystal is widely used.
Although a multiple of the frequency of the used crystal
of 11.2896 MHz falls within the FM reception band, this
will not disturb the reception because the relatively low
frequency crystal is driven in a controlled way and the
sine wave of the crystal has in the FM reception band
only very minor harmonics.
8.10
Supply of the digital part (VDDD3V1 to VDDD3V4)
The supply voltage on pins VDDD3V1 to VDDD3V4 must be
for at least 10 ms earlier active than the supply voltage
applied to pin VDD(OSC).
8.11
CL_GEN, audio clock recovery block
When an external I2S-bus or SPDIF source is connected,
the FSDAC circuitry needs an 256fs related clock. This
clock is recovered from either the incoming WS of the
digital serial input or the WS derived from the
SPDIF1/SPDIF2 input. There is also a possibility to
provide the chip with an external clock, in that case it must
be a 256fs clock with a fixed phase relation to the source.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SAA7707H | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Car radio Digital Signal Processor CDSP |
| SAA7708H | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Car Radio Digital Signal Processor |
| SAA7709/N107 | 制造商:PHILIPS-SEMI 功能描述: |
| SAA7709H/N103 | 功能描述:音频 DSP DIGITAL SIGNAL PROCESSOR RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
| SAA7709H/N103,518 | 功能描述:音频 DSP DIRAC-2 RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
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