参数资料
型号: SAB-C165-L25F
厂商: SIEMENS A G
元件分类: 微控制器/微处理器
英文描述: 16-BIT, 14 MHz, MICROCONTROLLER, PQFP100
封装: TQFP-100
文件页数: 5/18页
文件大小: 306K
代理商: SAB-C165-L25F
11Jul97@13:32h Intermediate Version
11
Semiconductor Group
C165 / 3 V
ALE falling edge to RD,
WR (with RW-delay)
t8
CC 26 + t
A
TCL - 10
+
tA
–ns
ALE falling edge to RD,
WR (no RW-delay)
t9
CC -10 + t
A
–-10 +
t
A
–ns
Address float after RD,
WR (with RW-delay)
t
10
CC –
5
–5ns
Address float after RD,
WR (no RW-delay)
t
11
CC –
41
TCL + 5
ns
RD, WR low time
(with RW-delay)
t12
CC 51 +
tC
2TCL - 20
+
t
C
–ns
RD, WR low time
(no RW-delay)
t
13
CC 87 +
t
C
3TCL - 20
+
t
C
–ns
RD to valid data in
(with RW-delay)
t
14
SR –
41 +
t
C
2TCL - 30
+
t
C
ns
RD to valid data in
(no RW-delay)
t
15
SR –
77 +
t
C
3TCL - 30
+
t
C
ns
ALE low to valid data in
t
16
SR –
82
+
t
A + tC
3TCL - 25
+
t
A + tC
ns
Address to valid data in
t
17
SR –
98
+ 2
tA + tC
4TCL - 45
+ 2
tA + tC
ns
Data hold after RD
rising edge
t
18
SR 0
0–ns
Data float after RD
t
19
SR –
56 +
t
F
2TCL - 15
+
tF
ns
Data valid to WR
t
22
CC 36 +
t
C
2TCL - 35
+
t
C
–ns
Data hold after WR
t23
CC 56 +
tF
2TCL - 15
+
t
F
–ns
ALE rising edge after RD,
WR
t25
CC 56 +
tF
2TCL - 15
+
t
F
–ns
Address hold after RD,
WR
t27
CC 56 +
tF
2TCL - 15
+
t
F
–ns
ALE falling edge to CS
t
38
CC -5 -
t
A
20 -
t
A
*)
-5 -
t
A
20 -
t
A
*)
ns
CS low to Valid Data In
t39
SR –
72
+
t
C + 2tA
3TCL - 35
+
t
C+2tA
ns
Parameter
Symbol
Max. CPU Clock
= 14 MHz
(0 to 70 °C)
Variable CPU Clock
1/2TCL=1..14 MHz, 0..70 °C
1/2TCL=1..12 MHz, -40..85°C
Unit
min.
max.
min.
max.
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