参数资料
型号: SAB-C165-L25F
厂商: SIEMENS A G
元件分类: 微控制器/微处理器
英文描述: 16-BIT, 14 MHz, MICROCONTROLLER, PQFP100
封装: TQFP-100
文件页数: 7/18页
文件大小: 306K
代理商: SAB-C165-L25F
11Jul97@13:32h Intermediate Version
13
Semiconductor Group
C165 / 3 V
AC Characteristics
Demultiplexed Bus
V
CC = 2.7 V to 3.6 V; VSS = 0 V
T
A = 0 to +70 °C
for SAB-C165-L25M, SAB-C165-R25M, SAB-C165-L25F, SAB-C165-R25F
TA = -40 to +85 °C
for SAF-C165-L25M
C
L (for PORT0, PORT1, Port 4, ALE, RD, WR, BHE, CLKOUT) = 100 pF
C
L (for Port 6, CS) = 100 pF
ALE cycle time = 4 TCL + 2
tA + tC + tF (143/166.7 ns at 14/12 MHz CPU clock without waitstates)
Parameter
Symbol
Max. CPU Clock
= 14 MHz
(0 to 70 °C)
Variable CPU Clock
1/2TCL=1..14 MHz, 0..70 °C
1/2TCL=1..12 MHz, -40..85°C
Unit
min.
max.
min.
max.
ALE high time
t5
CC 16 +
tA
TCL - 20
+
t
A
–ns
Address setup to ALE
t
6
CC 6 + t
A
TCL - 30
+
t
A
–ns
ALE falling edge to RD,
WR (with RW-delay)
t
8
CC 26 + t
A
TCL - 10
+
t
A
–ns
ALE falling edge to RD,
WR (no RW-delay)
t
9
CC -10 + t
A
–-10
+
t
A
–ns
RD, WR low time
(with RW-delay)
t
12
CC 51 +
t
C
2TCL - 20
+
t
C
–ns
RD, WR low time
(no RW-delay)
t
13
CC 87 +
t
C
3TCL - 20
+
tC
–ns
RD to valid data in
(with RW-delay)
t
14
SR –
41 +
t
C
2TCL - 30
+
tC
ns
RD to valid data in
(no RW-delay)
t
15
SR –
77 +
t
C
3TCL - 30
+
tC
ns
ALE low to valid data in
t
16
SR –
82
+
t
A + tC
3TCL - 25
+
t
A + tC
ns
Address to valid data in
t17
SR –
98
+ 2
t
A + tC
4TCL - 45
+ 2
t
A + tC
ns
Data hold after RD
rising edge
t18
SR 0
0–ns
Data float after RD rising
edge (with RW-delay 1))
t20
SR –
56 +
tF
2TCL - 15
+ 2
t
A + tF
1)
ns
Data float after RD rising
edge (no RW-delay 1))
t
21
SR –
26 +
t
F
TCL - 10
+ 2
t
A + tF
1)
ns
Data valid to WR
t
22
CC 36 +
t
C
2TCL - 35
+
t
C
–ns
相关PDF资料
PDF描述
SAB-C165-R25M 16-BIT, MROM, 14 MHz, MICROCONTROLLER, PQFP100
SAB-C502-LN 8-BIT, 12 MHz, MICROCONTROLLER, PQCC44
SAB-C502-LP 8-BIT, 12 MHz, MICROCONTROLLER, PDIP40
SAF-C502-LP 8-BIT, 12 MHz, MICROCONTROLLER, PDIP40
SAF-C502-2R20N 8-BIT, MROM, 20 MHz, MICROCONTROLLER, PQCC44
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