参数资料
型号: SAB80C517-N-T40
厂商: INFINEON TECHNOLOGIES AG
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQCC84
封装: PLASTIC, LCC-84
文件页数: 37/61页
文件大小: 1054K
代理商: SAB80C517-N-T40
SAB 80C517/80C537
Semiconductor Group
41
Serial Interface 1
Serial interface 1 can operate in two asynchronous modes:
Mode A:
9-bit UART, variable baud rate.
11 bits are transmitted (through TXD0) or received (through RXD0): a start bit (0),
8 data bits (LSB first), a programmable 9th, and a stop bit (1). On transmission, the
9th data bit (TB81 in S1CON) can be assigned to the value of 0 or 1. For example,
the parity bit (P in the PSW) could be moved into TB81 or a second stop bit by
setting TB81 to 1. On reception the 9th data bit goes into RB81 in special function
register S1CON, while the stop bit is ignored.
Mode B:
8-bit UART, variable baud rate.
10 bits are transmitted (through TXD1) or received (through RXD1): a start bit (0),
8 data bits (LSB first), and a stop bit (1). On reception, the stop bit goes into RB81
in special function register S1CON.
Variable Baud Rates for Serial Interface 1
Variable baud rates for modes A and B of serial interface 1 can be derived from a dedicated
baud rate generator.
The baud rate clock (baud rate =
) is generated by a 8-bit free
running timer with programmable reload register. SAB 80C517 devices with stepping code
"CA" or later provide a 10-bit free running timer for baud rate generation.
Mode A, B baud rate =
Watchdog Units
The SAB 80C517 offers two enhanced fail safe mechanisms, which allow an automatic recov-
ery from hardware failure or software upset:
– programmable watchdog timer (WDT), variable from 512 ms up to about 1.1 s time out
period @12 MHz. Upward compatible to SAB 80515 watchdog.
– oscillator watchdog (OWD), monitors the on-chip oscillator and forces the microcontroller to
go into reset state, in case the on-chip oscillator fails.
Programmable Watchdog Timer
The WDT can be activated by hardware or software.
Hardware initialization is done when pin PE/SWD (Pin 4) is held high during RESET. The
SAB 80C517 then starts program execution with the WDT running. Pin PE/SWD doesn’t allow
dynamic switching of the WDT.
Software initialization is done by setting bit SWDT. A refresh of the watchdog timer is done by
setting bits WDT and SWDT consecutively.
A block diagram of the watchdog timer is shown in figure 11.
When a watchdog timer reset occurs, the watchdog timer keeps on running, but a status flag
WDTS is set. This flag can also be manipulated by software.
baud rate clock
16
----------------------------------------
f
OSC
32
2
10
Reload Value
×
------------------------------------------------------------------------
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