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参数资料
| 型号： | SAF-C161O-LM 3V HA |
| 厂商： | Infineon Technologies |
| 文件页数： | 2/66页 |
| 文件大小： | 0K |
| 描述： | IC MCU 16BIT ROM/LESS MQFP-80-1 |
| 标准包装： | 1 |
| 系列： | C16xx |
| 核心处理器： | C166 |
| 芯体尺寸： | 16-位 |
| 速度： | 20MHz |
| 连通性： | EBI/EMI，SPI，UART/USART |
| 外围设备： | POR，PWM，WDT |
| 输入/输出数： | 63 |
| 程序存储器类型： | ROMless |
| RAM 容量： | 2K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 3 V ~ 3.6 V |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 80-QFP |
| 包装： | 剪切带 (CT) |
| 产品目录页面： | 736 (CN2011-ZH PDF) |
| 其它名称： | SAF-C161O-LM3VHACT SAF-C161O-LM3VHACT-ND SAF-C161O-LM3VHAINCT |
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C161K
C161O
Data Sheet
6
V2.0, 2001-01
RD
25
O
External Memory Read Strobe. RD is activated for every
external instruction or data read access.
WR/
WRL
26
O
External Memory Write Strobe. In WR-mode this pin is
activated for every external data write access. In WRL-mode
this pin is activated for low byte data write accesses on a 16-
bit bus, and for every data write access on an 8-bit bus. See
WRCFG in register SYSCON for mode selection.
ALE
27
O
Address Latch Enable Output. Can be used for latching the
address into external memory or an address latch in the
multiplexed bus modes.
EA
28
I
External Access Enable pin. A low level at this pin during and
after Reset forces the C161K/O to begin instruction
execution out of external memory. A high level forces
execution out of the internal program memory.
“ROMless” versions must have this pin tied to ‘0’.
PORT0
P0L.0-7
P0H.0-7
29-36
39-46
IO
PORT0 consists of the two 8-bit bidirectional I/O ports P0L
and P0H. It is bit-wise programmable for input or output via
direction bits. For a pin configured as input, the output driver
is put into high-impedance state. In case of an external bus
configuration, PORT0 serves as the address (A) and
address/data (AD) bus in multiplexed bus modes and as the
data (D) bus in demultiplexed bus modes.
Demultiplexed bus modes:
Data Path Width:
8-bit
16-bit
P0L.0 – P0L.7:
D0 – D7
P0H.0 – P0H.7:
I/O
D8 – D15
Multiplexed bus modes:
Data Path Width:
8-bit
16-bit
P0L.0 – P0L.7:
AD0 – AD7
P0H.0 – P0H.7:
A8 – A15
AD8 – AD15
PORT1
P1L.0-7
P1H.0-7
47-54
55-62
IO
PORT1 consists of the two 8-bit bidirectional I/O ports P1L
and P1H. It is bit-wise programmable for input or output via
direction bits. For a pin configured as input, the output driver
is put into high-impedance state. PORT1 is used as the 16-
bit address bus (A) in demultiplexed bus modes and also
after switching from a demultiplexed bus mode to a
multiplexed bus mode.
Table 2
Pin Definitions and Functions (cont’d)
Symbol Pin
Num
Input
Outp.
Function
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SAFC161OLM3VHAXT | 制造商:Infineon Technologies AG 功能描述:MCU 16-Bit C166 CISC/RISC ROMLess 3.3V 80-Pin MQFP |
| SAFC161OLMHA | 制造商:Infineon Technologies AG 功能描述: |
| SAF-C161O-LM-HA | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SAFC161OLMHATR | 制造商:Infineon Technologies AG 功能描述: |
| SAFC161OLMHAX | 制造商:Infineon Technologies AG 功能描述: |
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