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参数资料
型号： SAK-TC1767-256F133HL
厂商： INFINEON TECHNOLOGIES AG
元件分类： 微控制器/微处理器
英文描述： 32-BIT, FLASH, 133 MHz, RISC MICROCONTROLLER, PQFP176
封装： 0.50 MM PITCH, GREEN, PLASTIC, LQFP-176
文件页数： 14/126页
文件大小： 826K
代理商： SAK-TC1767-256F133HL
TC1767
Electrical Parameters
Data Sheet
106
V1.3, 2009-09
5.3.5
Phase Locked Loop (PLL)
Note: All PLL characteristics defined on this and the next page are not subject to
production test, but verified by design characterization.
Phase Locked Loop Operation
When PLL operation is enabled and configured, the PLL clock
f
VCO (and with it the LMB-
Bus clock
f
LMB) is constantly adjusted to the selected frequency. The PLL is constantly
adjusting its output frequency to correspond to the input frequency (from crystal or clock
source), resulting in an accumulated jitter that is limited. This means that the relative
deviation for periods of more than one clock cycle is lower than for a single clock cycle.
This is especially important for bus cycles using waitstates and for the operation of
timers, serial interfaces, etc. For all slower operations and longer periods (e.g. pulse train
generation or measurement, lower baudrates, etc.) the deviation caused by the PLL jitter
is negligible.
Two formulas are defined for the (absolute) approximate maximum value of jitter
D
m in
[ns] dependent on the K2 - factor, the LMB clock frequency
f
LMB in [MHz], and the
number
m of consecutive f
LMB clock periods.
(2)
(3)
Table 20
PLL Parameters (Operating Conditions apply)
Parameter
Symbol
Values
Unit
Note /
Test Con
dition
Min.
Typ.
Max.
Accumulated jitter
|D
m|–
–
7
ns
–
VCO frequency range
f
VCO
400
–
800
MHz –
VCO input frequency range
f
REF
8–
16
MHz –
PLL base frequency
1)
1) The CPU base frequency with which the application software starts after PORST is calculated by dividing the
limit values by 16 (this is the K2 factor after reset).
f
PLLBASE
50
200
320
MHz –
PLL lock-in time
t
L
––
200
s–
for
K2
100
≤
()
and
m
f
LMB MHz
[]
() 2
≤
()
Dmns
[]
740
K2
f
LMB MHz
[]
×
---------------------------------------------5
+
10 01
,
K2
×
–
()
m1
–
()
×
05
,
f
LMB MHz
[] 1
–
×
----------------------------------------------------------------
0 01
,
K2
×
+
×
=
else
Dmns
[]
740
K2
f
LMB MHz
[]
×
---------------------------------------------5
+
=
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相关代理商/技术参数
参数描述
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SAK-TC1767-256F133HLAD 制造商:Infineon Technologies AG 功能描述:
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