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| 型号： | SC16C2550IB48,128 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 11/46页 |
| 文件大小： | 0K |
| 描述： | IC DUART SOT313-2 |
| 标准包装： | 2,000 |
| 特点： | 2 通道 |
| 通道数： | 2，DUART |
| FIFO's： | 16 字节 |
| 电源电压： | 2.5V，3.3V，5V |
| 带自动流量控制功能： | 是 |
| 带IrDA 编码器/解码器： | 是 |
| 带故障启动位检测功能： | 是 |
| 带调制解调器控制功能： | 是 |
| 带CMOS： | 是 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 管件 |
| 其它名称： | 935270020128 SC16C2550IB48-T SC16C2550IB48-T-ND |
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Philips Semiconductors
SC16C2550
Dual UART with 16 bytes of transmit and receive FIFOs and IrDA
encoder/decoder
Product data
Rev. 03 — 19 June 2003
19 of 46
9397 750 11621
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
7.2.2
IER versus Receive/Transmit FIFO polled mode operation
When FCR[0] = logic 1, resetting IER[0-3] enables the SC16C2550 in the FIFO
polled mode of operation. In this mode, interrupts are not generated and the user
must poll the LSR register for TX and/or RX data status. Since the receiver and
transmitter have separate bits in the LSR either or both can be used in the polled
mode by selecting respective transmit or receive control bit(s).
LSR[0] will be a logic 1 as long as there is one byte in the receive FIFO.
LSR[1-4] will provide the type of receive errors, or a receive break, if encountered.
LSR[5] will indicate when the transmit FIFO is empty.
LSR[6] will indicate when both the transmit FIFO and transmit shift register are
empty.
LSR[7] will show if any FIFO data errors occurred.
7.3 FIFO Control Register (FCR)
This register is used to enable the FIFOs, clear the FIFOs, set the receive FIFO
trigger levels, and select the DMA mode.
7.3.1
DMA mode
Mode 0 (FCR bit 3 = 0): Set and enable the interrupt for each single transmit or
receive operation, and is similar to the 16C450 mode. Transmit Ready (TXRDY) on
PLCC44 and LQFP48 packages will go to a logic 0 whenever the FIFO (THR, if FIFO
is not enabled) is empty. Receive Ready (RXRDY) on PLCC44 and LQFP48
packages will go to a logic 0 whenever the Receive Holding Register (RHR) is loaded
with a character.
Mode 1 (FCR bit 3 = 1): Set and enable the interrupt in a block mode operation. The
transmit interrupt is set when the transmit FIFO is empty. TXRDY on PLCC and
LQFP48 packages remains a logic 0 as long as one empty FIFO location is available.
The receive interrupt is set when the receive FIFO lls to the programmed trigger
level. However, the FIFO continues to ll regardless of the programmed level until the
FIFO is full. RXRDY on PLCC44 and LQFP48 packages transitions LOW when the
FIFO reaches the trigger level, and transitions HIGH when the FIFO empties.
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| SC16C2550BIN40,112 | IC UART DUAL W/FIFO 40-DIP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SC16C2550IN40 | 制造商:PHILIP 功能描述: |
| SC16C2550IN40,112 | 功能描述:IC UART DUAL W/FIFO 40-DIP RoHS:是 类别:集成电路 (IC) >> 接口 - UART（通用异步接收器/发送器） 系列:- 标准包装:250 系列:- 特点:* 通道数:2，DUART FIFO's:16 字节 规程:RS232，RS485 电源电压:2.25 V ~ 5.5 V 带并行端口:- 带自动流量控制功能:是 带IrDA 编码器/解码器:是 带故障启动位检测功能:是 带调制解调器控制功能:是 带CMOS:是 安装类型:表面贴装 封装/外壳:48-TQFP 供应商设备封装:48-TQFP（7x7） 包装:托盘 其它名称:XR16L2551IM-F-ND |
| SC16C2552 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Dual UART with 16-byte transmit and receive FIFOs |
| SC16C2552B | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs |
| SC16C2552BIA44 | 功能描述:UART 接口集成电路 16CB 2.5V-5V 2CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
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