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参数资料
| 型号： | SC16C752IB48,151 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 16/47页 |
| 文件大小： | 0K |
| 描述： | IC UART DUAL W/FIFO 48-LQFP |
| 标准包装： | 250 |
| 通道数： | 2，DUART |
| FIFO's： | 64 字节 |
| 电源电压： | 2.5V，3.3V，5V |
| 带自动流量控制功能： | 是 |
| 带故障启动位检测功能： | 是 |
| 带调制解调器控制功能： | 是 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 托盘 |
| 其它名称： | 568-3289 935270055151 SC16C752IB48-S |
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Philips Semiconductors
SC16C752
Dual UART with 64-byte FIFO
Product data
Rev. 04 — 20 June 2003
23 of 47
9397 750 11635
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
7.5 Line status register (LSR)
Table 13 shows the line status register bit settings.
When the LSR is read, LSR[4:2] reect the error bits (BI, FE, PE) of the character at
the top of the RX FIFO (next character to be read). The LSR[4:2] registers do not
physically exist, as the data read from the RX FIFO is output directly onto the output
data bus, DI[4:2], when the LSR is read. Therefore, errors in a character are identied
by reading the LSR and then reading the RHR.
LSR[7] is set when there is an error anywhere in the RX FIFO, and is cleared only
when there are no more errors remaining in the FIFO.
Reading the LSR does not cause an increment of the RX FIFO read pointer. The
RX FIFO read pointer is incremented by reading the RHR.
Table 13:
Line Status Register bits description
Bit
Symbol
Description
7
LSR[7]
FIFO data error.
Logic 0 = No error (normal default condition).
Logic 1 = At least one parity error, framing error, or break indication is
in the receiver FIFO. This bit is cleared when no more errors are
present in the FIFO.
6
LSR[6]
THR and TSR empty. This bit is the Transmit Empty indicator.
Logic 0 = Transmitter hold and shift registers are not empty.
Logic 1 = Transmitter hold and shift registers are empty.
5
LSR[5]
THR empty. This bit is the Transmit Holding Register Empty indicator.
Logic 0 = Transmit hold register is not empty.
Logic 1 = Transmit hold register is empty. The processor can now load
up to 64 bytes of data into the THR if the TX FIFO is enabled.
4
LSR[4]
Break interrupt.
Logic 0 = No break condition (normal default condition).
Logic1=A break condition occurred and associated byte is 00, i.e.,
RX was LOW for one character time frame.
3
LSR[3]
Framing error.
Logic 0 = No framing error in data being read from RX FIFO (normal
default condition).
Logic1=Framing error occurred in data being read from RX FIFO, i.e.,
received data did not have a valid stop bit.
2
LSR[2]
Parity error.
Logic 0 = No parity error (normal default condition).
Logic 1 = Parity error in data being read from RX FIFO.
1
LSR[1]
Overrun error.
Logic 0 = No overrun error (normal default condition).
Logic 1 = Overrun error has occurred.
0
LSR[0]
Data in receiver.
Logic 0 = No data in receive FIFO (normal default condition).
Logic 1 = At least one character in the RX FIFO.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SC16C754 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Quad UART with 64-byte FIFO |
| SC16C754B | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs |
| SC16C754BIA68 | 功能描述:UART 接口集成电路 16CB 2.5V-5V 4CH UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| SC16C754BIA68,512 | 功能描述:UART 接口集成电路 16CB 2.5V-5V 4CH RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| SC16C754BIA68,518 | 功能描述:UART 接口集成电路 4CH. UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
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