参数资料
型号: SC16C754BIBM,151
厂商: NXP Semiconductors
文件页数: 40/50页
文件大小: 0K
描述: IC UART QUAD W/FIFO 64-LQFP
产品培训模块: Stand-Alone UARTs
标准包装: 250
通道数: 4,QUART
FIFO's: 64 字节
电源电压: 2.5V,3.3V,5V
带自动流量控制功能:
带故障启动位检测功能:
带调制解调器控制功能:
安装类型: 表面贴装
封装/外壳: 64-LQFP
供应商设备封装: 64-LQFP(7x7)
包装: 托盘
产品目录页面: 828 (CN2011-ZH PDF)
其它名称: 568-3290
935279069151
SC16C754BIBM-S
PIC16(L)F1826/27
DS41391D-page 46
2011 Microchip Technology Inc.
REGISTER 4-2:
CONFIGURATION WORD 2
R/P-1
U-1
R/P-1
R/P-1/1
LVP(1)
DEBUG(2)
—BORV
STVREN
PLLEN
bit 13
bit 8
U-1
R/P-1/1
U-1
R/P-1
Reserved
—WRT<1:0>
bit 7
bit 0
Legend:
R = Readable bit
P = Programmable bit
U = Unimplemented bit, read as ‘1’
‘0’ = Bit is cleared
‘1’ = Bit is set
-n = Value when blank or after Bulk Erase
bit 13
LVP:
Low-Voltage Programming Enable bit
1
= Low-voltage programming enabled
0
= High-voltage on MCLR must be used for programming
bit 12
DEBUG:
In-Circuit Debugger Mode bit
1
= In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins
0
= In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger
bit 11
Unimplemented:
Read as ‘1’
bit 10
BORV:
Brown-out Reset Voltage Selection bit
1
= Brown-out Reset voltage set to 1.9V (typical)
0
= Brown-out Reset voltage set to 2.5V (typical)
bit 9
STVREN:
Stack Overflow/Underflow Reset Enable bit
1
= Stack Overflow or Underflow will cause a Reset
0
= Stack Overflow or Underflow will not cause a Reset
bit 8
PLLEN:
PLL Enable bit
1
= 4xPLL enabled
0
= 4xPLL disabled
bit 7-5
Unimplemented:
Read as ‘1’
bit 4
Reserved:
This location should be programmed to a ‘1’.
bit 3-2
Unimplemented:
Read as ‘1’
bit 1-0
WRT<1:0>:
Flash Memory Self-Write Protection bits
2 kW Flash memory (PIC16(L)F1826 only):
11
= Write protection off
10
= 000h to 1FFh write-protected, 200h to 7FFh may be modified by EECON control
01
= 000h to 3FFh write-protected, 400h to 7FFh may be modified by EECON control
00
= 000h to 7FFh write-protected, no addresses may be modified by EECON control
4 kW Flash memory (PIC16(L)F1827 only):
11
= Write protection off
10
= 000h to 1FFh write-protected, 200h to FFFh may be modified by EECON control
01
= 000h to 7FFh write-protected, 800h to FFFh may be modified by EECON control
00
= 000h to FFFh write-protected, no addresses may be modified by EECON control
Note 1:
The LVP bit cannot be programmed to ‘0’ when Programming mode is entered via LVP.
2:
The DEBUG bit in Configuration Word is managed automatically by device development tools
including debuggers and programmers. For normal device operation, this bit should be
maintained as a '1'.
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