参数资料
型号: SC16C850IBS,151
厂商: NXP Semiconductors
文件页数: 15/55页
文件大小: 0K
描述: IC UART SGL-CH 3.3V 32-HVQFN
标准包装: 490
特点: 可编程
通道数: 1,UART
FIFO's: 128 字节
规程: RS485
电源电压: 2.5 V ~ 3.3 V
带自动流量控制功能:
带IrDA 编码器/解码器:
带故障启动位检测功能:
带调制解调器控制功能:
带CMOS:
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
供应商设备封装: 32-HVQFN(5x5)
包装: 托盘
产品目录页面: 828 (CN2011-ZH PDF)
其它名称: 568-4778
935283103151
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SC1
6
C850
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ed.
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ct
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sheet
R
e
v
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1
N
o
vem
ber
2010
22
o
f55
N
X
P
Semi
conductor
s
SC16C850
2
.5
to
3.3
V
UART
with
1
28-
byt
e
FIFOs
and
IrDA
e
n
cod
e
r/dec
ode
r
[1]
The value shown represents the register’s initialized HEX value; X = not applicable.
[2]
Accessible only when LCR[7] is logic 0, and EFCR[2:0] are logic 000b.
[3]
This bit is only accessible when EFR[4] is set.
[4]
Baud rate registers accessible only when LCR[7] is logic 1.
[5]
Enhanced Feature Register, Xon1/Xon2 and Xoff1/Xoff2 are accessible only when LCR is set to 0xBF, and EFCR[2:1] are logic 0.
[6]
Second Special registers are accessible only when EFCR[0] = 1, and EFCR[2:1] are logic 0.
[7]
First extra feature register set is only accessible when EFCR[2:1] = 01b.
[8]
Second extra feature register set is only accessible when EFCR[2:1] = 10b.
Enhanced feature register set[5]
0
1
0
EFR
0x00
Auto CTS
Auto RTS
special
character
select
Enable
IER[7:4],
ISR[5:4],
FCR[5:4],
MCR[7:5]
Cont-3 TX,
RX Control
Cont-2 TX,
RX Control
Cont-1 TX,
RX Control
Cont-0 TX,
RX Control
R/W
1
0
Xon1
0x00
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W
1
0
1
Xon2
0x00
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
R/W
1
0
Xoff1
0x00
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W
1
Xoff2
0x00
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
R/W
First extra feature register set[7]
0
1
0
TXINTLVL
0x00
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W
1
0
RXINTLVL
0x00
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W
1
0
FLWCNTH
0x00
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W
1
FLWCNTL
0x00
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W
Second extra feature register set[8]
0
1
0
CLKPRES
0x00
reserved
bit 3
bit 2
bit 1
bit 0
R/W
1
0
RS485TIME 0x00
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W
1
0
AFCR2
0x00
reserved
RS485 RTS
Invert
Auto RS485
RTS
RS485
RTS/DTR
Transmitter
Disable
Receiver
Disable
9-bit Enable
R/W
1
AFCR1
0x00
reserved
Sleep
RXLow
reserved
RTS/CTS
mapped to
DTR/DSR
Software
Reset
TSR
Interrupt
R/W
Table 8.
SC16C850 internal registers …continued
A2 A1 A0 Register
Default[1]
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
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