参数资料
| 型号： | SC4525CSETRT |
| 厂商： | Semtech |
| 文件页数： | 15/22页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 3A 8SOIC |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 1 V ~ 26.88 V |
| 输入电压： | 3 V ~ 28 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 300kHz ~ 1.3MHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm Width）裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 8-SOIC-EP |
| 其它名称： | SC4525CSEDKR |
SC4525C
Applications Information (Cont.)
A C = ? 20 x log ? ?
?
V O ? ?
10 20
R 7 = = 16.9 k
C 5 =
= 0.589 nF
2 π x 16 x 10 x 16.9 x 10 3
C 8 =
= 15.7 pF
0 20
R 7 =
C 5 =
C 8 =
P SW =
x t S x V IN x I O x F SW
= D x V BST x O
P BST
Therefore, the procedure of the voltage loop design for
the SC4525C can be summarized as:
( ) Plot the converter gain, i.e. control to feedback transfer
function.
(2) Select the open loop crossover frequency, F C , between
0% and 20% of the switching frequency. At F C , find the
required compensator gain, A C . In typical applications with
ceramic output capacitors, the ESR zero is neglected and
the required compensator gain at F C can be estimated by
? V FB ?
x x
? G CA R S 2 π F C C O
(3) Place the compensator zero, F Z , between 0% and
20% of the crossover frequency, F C .
(4) Use the compensator pole, F P , to cancel the ESR zero, F Z .
(5) Then, the parameters of the compensation network
can be calculated by
AC
g m
2 π F Z R 7
2 π F P R 7
where g m =0.3mA/V is the EA gain of the SC4525C.
Example : Determine the voltage compensator for an
Then the compensator parameters are
14. 1
0.3 x 10 ? 3
1
3
1
2 π x 600 x 10 3 x 16.9 x 10 3
Select R 7 = 6.9k, C 5 =0.68nF, and C 8 =22pF for the design.
Compensator parameters for various typical applications
are listed in Table 5. A MathCAD program is also available
upon request for detailed calculation of the compensator
parameters.
Thermal Considerations
For the power transistor inside the SC4525C, the
conduction loss P C , the switching loss P SW , and bootstrap
circuit loss P BST, can be estimated as follows:
P C = D x V CESAT x I O
2
I
40
where V BST is the BST supply voltage and t S is the equivalent
switching time of the NPN transistor (see Table 4).
Table 4. Typical switching time
800kHz, 2V to 3.3V/3A converter with 47uF ceramic
output capacitor.
Input Voltage
12V
1A
12.5ns
Load Current
2A
15.3ns
3A
18ns
Choose a loop gain crossover frequency of 80kHz, and
place voltage compensator zero and pole at F Z = 6kHz
(20% of F C ), and F P =600kHz. From the equation in step
(2), the required compensator gain at F C is
24V 22ns 25ns
28V 25.3ns 28ns
In addition, the quiescent current loss is
28ns
31ns
A C
20 log
1
18.5 3 . 53 10
3
1
2 80 10 3 47 10 6
1 . 0
3 . 3
14.1 dB
P Q = V IN x 2mA
5
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