参数资料
| 型号： | SC824ULTRT |
| 厂商： | Semtech |
| 文件页数： | 17/29页 |
| 文件大小： | 0K |
| 描述： | IC BATTERY MANAGEMENT |
| 标准包装： | 1 |
| 系列： | * |
| 其它名称： | SC824ULDKR |
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SC824
Applications Information (continued)
When V EN_NTC < RT NTC_DIS ×V VSYS (nominally 10% of V VSYS ), the
SC824 charger is disabled. This threshold allows the
EN_NTC pin to be used as a disable pin, allowing the
system controller to asynchronously disable or reset the
device by pulling EN_NTC to ground. When V EN_NTC <
RT NTC_DIS ×V VSYS , the charger is turned off, the charge timer
is reset, and the STAT1 status output is turned off. While
disabled, the VIN input UVLO and OVP threshold detectors
remain active, and the STAT0 pin continues to indicate
charge cycle. The pre-charge stage timer is active even if
the timer function has been disabled.
When the battery voltage exceeds the pre-charge thresh-
old, the timer is reset and begins timing the CC stage. The
CC stage timer indicates a fault and halts charging if the
battery voltage has not reached V CV within the CC stage
fault timer duration (t CCF ). The CC stage timer is not active
if the timer function has been disabled.
whether the VIN input voltage is valid for charging.
An internally programmed CC stage duration of three
No-Battery operation is selected when the battery (along
with the thermistor) is removed, determined by the NTC
pin exceeding RT NTC_NBR × V VSYS , which is 95% of the VSYS
pin voltage. In No-Battery operation, the charge timer is
disabled and the output is regulated to V CV , subject to the
output current limit determined by the selected mode
and IPRGM pin resistance to GND. The STAT0 output
remains asserted to indicate that the charging source is
present and STAT1 is released. When returning to normal
charging (by reinstalling the battery and thermistor), the
timer is reset.
The response of the SC824 to an EN_NTC pin voltage
above the NTC Cold Fault threshold (but below RT NTC_NBR )
or below the low NTC Hot Fault threshold (but above
VT NTC_DIS ) is the same. Therefore the EN_NTC network can
be configured with the battery pack thermistor between
EN_NTC and VSYS, and a fixed resistor between EN_NTC
and ground, reversing the designation of the hot and cold
thresholds. This configuration may be used to disable the
hours can be selected by connecting RTIME directly to
VSYS. Or it can be programmed from two hours to 16
hours by selection of the resistance from the RTIME pin to
ground, as shown in the Block Diagram. The broad CC
stage timer programming range permits timer-protected
charging of large batteries with small charging currents,
such as in USB low power mode charging.
The value of t CCF is programmed according to Figures 4a
and 4b. Each figure shows the nominal t CCF duration versus
nominal R RTIME resistance as the center plot and two theo-
retical limit plots indicating maximum and minimum t CCF
duration versus nominal programming resistance. These
plots are derived from models of the expected worst-case
contribution of error sources that depend on programmed
current. The t CCF tolerance range includes the uncertainty
due to 1% tolerance resistors. The dots on each plot indi-
cate the currents obtained with EIA E96 standard value 1%
tolerance resistors. Figures 4a and 4b show low and high
resistance ranges, respectively.
charger when the battery pack is removed.
When the battery voltage has risen to V CV , the CC timer
For detailed design guidance for ratiometric NTC inter-
faces, including thermistor selection guidelines, see the
Semtech Application Note AN–PM–0801, NTC Thermistor
Network Design for Ratiometric Thresholds .
Charge Timer
The SC824 provides a multi-stage charge timer. Each
stage of the charge cycle is timed separately, in compli-
ance with IEEE Std. 1725-2006, Section 7.3.5.
The pre-charge stage timer indicates a fault and halts
charging if the battery voltage has not exceeded the pre-
charge threshold within 45 minutes after the start of the
stage ends, the timer is reset, and the CV timer stage
begins. The CV stage timer is set to expire in three hours
using a fixed-duration internal timer. Upon termination
by current (10% of fast charge current) or expiration of the
CV stage timer (whichever occurs first), end-of-charge is
indicated by releasing STAT1 and the timer is reset. Note
that CV stage time-out is not a fault, but rather is regarded
as termination by another means. This alternative termi-
nation-by-time behavior ensures termination in the case
that the minimum load current exceeds the programmed
termination current.
Following termination, by current or by timer CV stage
time-out, the post-termination top-off timer stage begins.
17
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