参数资料
| 型号： | SC824ULTRT |
| 厂商： | Semtech |
| 文件页数： | 27/29页 |
| 文件大小： | 0K |
| 描述： | IC BATTERY MANAGEMENT |
| 标准包装： | 1 |
| 系列： | * |
| 其它名称： | SC824ULDKR |
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SC824
Applications Information (continued)
D BYPASS
Opt.
R ISO_PD
SC824
R NPU
Q ISO
Device
Load
V ADAPTER
VIN
EN_NTC
MODE SELECT
CPU GPIO
2.2 μ F
1 μ F
R RTIME
VSYS
MODE
RTIME
GND
BAT
IPRGM
STAT0
STAT1
R IPRGM
2.2 μ F
R NTC
Thermistor
Battery
Pack
Figure 8 — Battery Isolation and Power Path Bypass ? Powering the Load Directly From the Charging Adapter
External Power Path Management
Some applications require that the battery be isolated
from the load while charging. Figure 8 illustrates a typical
charger bypass circuit. This circuit powers the load directly
from the charging source via the Schottky diode D BYPASS .
When the charging source is present, the p-channel
MOSFET battery isolation switch Q ISO source-to-gate
voltage V SG is equal to minus the D BYPASS forward-biased
voltage drop, ensuring that the switch Q ISO is off (open).
When the charging source is removed, the MOSFET gate is
pulled down to ground by R ISO_PD , closing the battery isola-
tion switch and connecting the battery to the load.
When the charging source is removed, the turn-on of Q ISO
could be delayed due to its gate capacitance. If so, the
With the load isolated from the battery, the charging
adapter must supply both the load current and the charg-
ing current. If the sum of these should ever exceed the
current capacity of the adapter, V ADAPTER will be pulled
down. Selection of either of the SC824 USB modes will
enable Under-Voltage Load Regulation. UVLR will reduce
the charge current if needed to ensure that V ADAPTER will
remain at or above V UVLR , maintaining the load supply
voltage
To better understand the trade-offs between charger
bypass and direct connection of the load to the battery,
see the Semtech Application Note AN–PM–0802, Tradeoffs
Between Direct Battery Connection vs. Bypassing the
Charger .
substrate PN diode of Q ISO will become forward biased,
holding the load voltage to within 0.7V of the battery
voltage until V SG > V TH , turning on Q ISO . This momentary
voltage drop can be mitigated by the use of an optional
Schottky diode in parallel with Q ISO , as shown.
27
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