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参数资料
| 型号： | SED1231DBB |
| 元件分类： | 显示控制器 |
| 英文描述： | 21 X 60 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC171 |
| 封装： | GOLD BUMP, DIE-171 |
| 文件页数： | 4/8页 |
| 文件大小： | 255K |
| 代理商： | SED1231DBB |
4
SED1230 Series
*1:
A wide operating voltage range is guaranteed but an abrupt voltage variation in the access status of the MPU is not
guaranteed.
*2:
The operating voltage range is applicable to the case where an external power supply is used.
*3:
D0 - D5, D6 (SCL), D7 (SI), A0, RES, CS WR (E), P/S, IF
*4:
This is a resistance value when a voltage of 0.1 V is applied between output pin SEGn, SEGSn, COMn or COMSn, and each
power pin (V1, V2, V3 or V4). It is specified in the range of operating voltage (2).
RON = 0.1 V /
I
(
I: Current flowing when 0.1 V is applied between the power and output)
*5:
Character “” display. This is applicable to the case where no access is made from the MPU and the built-in power circuit
and oscillating circuit are in operation.
*6:
This is applicable to the case where the built-in power circuit is OFF and the oscillating circuit is in operation in the standby
mode.
*7:
Current consumption when data is always written by fcyc.
The current consumption in the access state is almost proportional to the access frequency (fcyc).
When no access is made, only IDD (I) occurs.
*8:
tR (reset time) indicates the internal circuit reset completion time from the edge of the RES signal. Accordingly, the SED123*
usually enters the operating state after
tR.
*9:
The minimum pulse width of the RES signal is specified.
To cause a reset operation, it is necessary to input a pulse width exceeding tRW.
*10: When operating the boosting circuit, the power supply VSS must be used within the input voltage range.
s DC CHARACTERISTICS
(VDD = 0 V, VSS = –3.6 V to –2.4 V, Ta = –30 to 85
°C unless otherwise specified.)
Characteristic
Symbol
Condition
Min.
Typ.
Max.
Unit
Applicable pin
Power
Recommended
–3.6
–3.0
–2.4
V
VSS
supply
operation
VSS
voltage (1) Operable
–5.5
–3.0
–2.0
*1
Power
Recommended
–11.0
–5.0
V
V5
supply
operation
V5
voltage (2) Operable
–11.0
–4.5
*2
Operable
V1, V2
0.6
×V5
VDD
VV1, V2
Operable
V3, V4
VDD
0.8
×V5
VV3, V4
High-level input voltage
VIHC
0.2
×VSS
VDD
V*3
Low-level input voltage
VILC
VSS
0.8
×VSS
V*3
Input leakage current
ILI
VIN = VDD or VSS
–1.0
1.0
A*3
LC driver ON resistance
RON
Ta=25
°CV5=–7.0V
20
40
K
COM,SEG
V=0.1V
*4
Static current consumption
IDDQ
0.1
5.0
AVDD
Dynamic current
IDD
Display State V5 = –7 V without load
100
AVDD *5
consumption
Standby state Oscillation ON,
20
AVDD *6
Power OFF
Sleep state
Oscillation OFF,
5
AVDD
Power OFF
Access state
fcyc=200KHz
500
AVDD *7
Input pin capacity
CIN
Ta=25
°C
f=1MHz
5.0
8.0
pF
*3
Reset time
tR
1.0
s*8
Reset pulse width
tRW
10
s*9
Input voltage
VSS
–3.6
–2.4
V
*10
Booster output voltage
VOUT
Double boosting state
–7.2
V
VOUT
Triple boosting state
–10.8
Voltage follower
V5
–11.0
–4.5
V
operating voltage
Reference voltage
VREG
Ta = 25
°C
–3.5
–3.1
–2.7
V
Built-in
power
supply
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