参数资料
型号: SED1240TXX
元件分类: 显示控制器
英文描述: 32 X 80 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC
封装: TCP
文件页数: 11/67页
文件大小: 736K
代理商: SED1240TXX
EPSON
8–19
SED1240 Series
SED1240
Series
Liquid crystal voltage generating circuit
The V5 potential is resistance-divided by the built-in
resistor of the IC or external resistors Ra and Rb,
generating potentials V1, V2, V3, and V4 required for
liquid crystal drive. Furthermore, potentials V1, V2, V3,
and V4 are impedance-converted by the voltage follower
and supplied to the liquid crystal drive circuit.
Regarding the liquid crystal drive voltage, the 1/5 bias or
1/4 bias can be selected by command. For liquid crystal
power pins, capacitors C2 for voltage stabilization must
be connected to pins V1 to V5 externally.
A reference circuit example of each case is shown below.
CAP1+
CAP1–
VOUT
V5
VDD, V0
C2
V1
V2
V3
V4
V5
VS1
VR
VSS
VSS2
SED124XDXX
C1
CAP2–
CAP2+
C1
[When using a V5 voltage regulating built-in resistor]
(Example of VSS2 = VSS, triple boosting)
CAP1+
CAP1–
VOUT
V5
R3
R2
R1
VDD, V0
C2
V1
V2
V3
V4
V5
VS1
VR
VSS
VSS2
SED124XDXX
C1
CAP2–
CAP2+
C1
[When using no V5 voltage regulating built-in resistor]
(Example of VSS2 = VSS, triple boosting)
CAP1+
CAP1–
VOUT
V5
VDD, V0
C2
V1
V2
V3
V4
V5
VS1
VR
VSS
VSS2
SED124XDXX
C1
CAP2–
CAP2+
C1
(Example of VSS2 = VSS, double boosting)
CAP1+
CAP1–
VOUT
V5
R3
R2
R1
VDD, V0
C2
V1
V2
V3
V4
V5
VS1
VR
VSS
VSS2
SED124XDXX
C1
CAP2–
CAP2+
C1
(Example of VSS2 = VSS, double boosting)
1 Using all of the boosting circuit, power regulating circuit, and voltage follower
Reference set values: C1: 0.47 to 4.7
F It is recommended to set optimum values suitable for the panel size in
C2: 0.1 to 4.7
F capacitors C1 and C2 while watching the liquid crystal display and drive
waveforms.
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