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参数资料
| 型号： | SED1242DGB |
| 元件分类： | 显示控制器 |
| 英文描述： | 16 X 80 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC210 |
| 封装： | DIE-210 |
| 文件页数： | 14/67页 |
| 文件大小： | 736K |
| 代理商： | SED1242DGB |
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EPSON
8–21
SED1240 Series
SED1240
Series
High power mode
The power circuit built-in the SED1240 series is a low
power consumption type. (when the high power mode is
OFF)
Accordingly, in the case of a large load liquid crystal or
panel, the display quality may be degraded. In this case,
the display quality can be improved by entering HPM =
‘1’ by command. Before determining whether or not to
use this mode, it is recommended to make a display check
with a real machine.
In case the display quality cannot be improved
satisfactorily though the high power mode is set, a liquid
crystal drive power must be supplied from the outside.
Low Power Consumption Mode
The SED1240 series is provided with the standby mode/
sleep mode to attain low power consumption in the
standby status of the unit.
q Standby mode
The standby mode is turned on and off by the power save
command and display off/booster circuit off command.
Only static icons can be displayed.
1. Liquid crystal display output
COM1 to COM32, COMS1, COMS2: VDD level
SEG1 to SEG80:
VDD level
SEGSA, B, C, D, E, F, G, H, I, J, COMSA: Can be
caused to come on by static drive.
Control the static icon display by SEGSA, B, C, D,
E, F, G, H, I, J, COMSA by the static icon RAM.
2. Contents of DDRAM, CGRAM, and symbol register
The written contents are kept in memory regardless
of the ON/OFF status of the standby mode.
3. The operation mode remains in the status provided
before execution of the standby mode. The internal
circuit for dynamic display output is stopped.
4. Oscillating circuit
For static display, the oscillating circuit must be ON.
q Sleep mode
Turn off the power circuit and the oscillating circuit, set
‘0’ in all the data of the static icon register, and execute
the power save command.
Then, the sleep mode is set and the current consumption
can be reduced to a value close to the static current.
1. Liquid crystal display output
COM1 to COM32, COMS1, COMS2: VDD level
SEG1 to SEG80, SEGS1, 2, 4, 5:
VDD level
SEGSA, B, C, D, E, F, G, H, I, J, COMSA: Set ‘0’
in all the data of the static icon register and blink ON/
OFF (for static icons).
2. Contents of SSRAM, CGRAM and symbol register
The written contents can be kept in memory regardless
of the ON/OFF status of the sleep mode.
3. The operation mode remains in the status provided
before execution of the sleep mode. All the internal
circuits are stopped.
4. Power circuit and oscillating circuit
Turn off the built-in power supply and oscillating
circuit by the power save command and the power
control command.
* Caution: If the oscillating circuit is stopped with the
static icon register data and blinking kept off, previous
display will remain on the icon. To avoid this, be sure
to turn off the data and blinking before stopping the
oscillating circuit.
Reset Circuit
When the RES input becomes active, this LSI will be put
into the initial setup status. Resetting is performed at the
‘L’ level of the RES input signal.
q Initial setup status
1. Line scroll register
LS1, 0 = 0 : Scroll amount 0 line
2. Line blink control
LB4 = 0
: DDRAM line 4 blink OFF
LB3 = 0
: DDRAM line 3 blink OFF
LB2 = 0
: DDRAM line 2 blink OFF
LB1 = 0
: DDRAM line 1 blink OFF
3. Vertical double-size display register
DD4 = 0
: Line 4 is displayed in standard form.
DD3 = 0
: Line 3 is displayed in standard form.
DD2 = 0
: Line 2 is displayed in standard form.
DD1 = 0
: Line 1 is displayed in standard form.
4. Display ON/OFF register
C = 0
: Cursor OFF
B = 0
: Blink OFF
D = 0
: Display OFF
RE = 0
: Extended register OFF
5. Power save register
O = 0
: Oscillating circuit OFF
PS = 0
: Power save OFF
6. Power control register
HPM = 0
: High power mode OFF
VC = 0
: Voltage regulating circuit OFF
VF = 0
: Voltage follower OFF
P = 0
: Boosting circuit OFF
IRS = 1
: For built-in resistor
BAS = 0
: 1/5 bias
IR1,0 = 00 : Rb/Ra = small
7. System set register
CG = 0
: CGRAM not used
CS = 0
: Left shift
SS = 0
: Normal display
R1, 0 = 0
: Standard ROM + OPTION ROM1
8. Electronic volume
(0,0,0,0,0)
9. Static icon ON/OFF control
(SEGSA, B, C, D, E, F, G, H, I, J) =
(0,0,0,0,0,0,0,0,0,0): Display OFF
10. Static icon blink control
(SEGSA, B, C, D, E, F, G, H, I, J) =
(0,0,0,0,0,0,0,0,0,0): Blink OFF
As seen in MPU Interface, the RES pin inputs data at the
same timing as MPU resetting and performs initialization
concurrently with the MPU. However, if this pin is put
into the high impedance for a certain period after the
MPU bus and ports are reset, perform a reset input after
the input to the SED1240 series is definitively set.
For the reset signal, it is necessary to input ‘0’ level
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SED1278 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:CMOS DOT MATRIX LCD CONTROLLER DRIVER |
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| SED1278D0B | 制造商:未知厂家 制造商全称:未知厂家 功能描述:CMOS DOT MATRIX LCD CONTROLLER DRIVER |
| SED1278D0C | 制造商:未知厂家 制造商全称:未知厂家 功能描述:CMOS DOT MATRIX LCD CONTROLLER DRIVER |
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