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参数资料
| 型号： | SFC3.3-4.WFT |
| 元件分类： | TVS二极管 - 瞬态电压抑制 |
| 英文描述： | 150 W, UNIDIRECTIONAL, 4 ELEMENT, SILICON, TVS DIODE, MO-211BB |
| 封装： | LEAD FREE, FLIP CHIP-6 |
| 文件页数： | 5/7页 |
| 文件大小： | 214K |
| 代理商： | SFC3.3-4.WFT |
5
2004 Semtech Corp.
www.semtech.com
PRELIMINARY
PROTECTION PRODUCTS
SFC3.3-4
Stencil Design
A properly designed stencil is key to achieving ad-
equate solder volume without compromising assembly
yields. A 0.100mm thick, laser cut, electro-polished
stencil with 0.275mm square apertures and rounded
corners is recommended.
Reflow Profile
The flip chip TVS can be assembled using the reflow
requirements for IPC/JEDEC standard J-STD-020 for
assembly of small body components. During reflow,
the component will self-align itself on the pad.
EPD TVS Characteristics
The SFC3.3-4 is constructed using Semtech’s propri-
etary EPD technology. The structure of the EPD TVS is
vastly different from the traditional pn-junction devices.
At voltages below 5V, high leakage current and junction
capacitance render conventional avalanche technology
impractical for most applications. However, by utilizing
the EPD technology, the SFC3.3-4 can effectively
operate at 3.3V while maintaining excellent electrical
characteristics.
The EPD TVS employs a complex nppn structure in
contrast to the pn structure normally found in tradi-
tional silicon-avalanche TVS diodes. The EPD mecha-
nism is achieved by engineering the center region of
the device such that the reverse biased junction does
not avalanche, but will “punch-through” to a conduct-
ing state. This structure results in a device with supe-
rior dc electrical parameters at low voltages while
maintaining the capability to absorb high transient
currents.
The SFC3.3-4 is the first device to combine the advan-
tages of flip chip technology with those of the EPD
process technology.
Stencil Design
Assembly Guideline for Pb-Free Soldering
The following are recommendations for the assembly
of this device:
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