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参数资料
| 型号： | SFCA8192H1BR4TO-I-DT-236-STD |
| 厂商： | Swissbit NA Inc |
| 文件页数： | 31/51页 |
| 文件大小： | 0K |
| 描述： | FLASH CFAST UDMA/MDMA/PIO 8GB |
| 标准包装： | 20 |
| 系列： | F-100 |
| 存储容量： | 8GB |
| 存储器类型： | 存储卡 - CFast? |
| 其它名称： | 1052-1080 |
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Features 0Ah and 8Ah are used to enable and disable Power Level 1 commands. Feature 0Ah is the default
feature for the CFAST card with extended power as they require Power Level 1 to perform their full set of
functions.
Power Enhanced CFAST cards are required to power up and execute all supported commands and protocols in
Power Level 0, their default feature shall be 8Ah: Disable Power Level 1 Commands. No commands are actually
excluded for such cards in Power Level 0 because no commands require Power Level 1. Features 55h and BBh are
the default features for the CFAST card; thus, the host does not have to issue this command with these features
unless it is necessary for compatibility reasons.
Feature code 9Ah enables the host to configure the card to best meet the host system’s power requirements.
The host sets a value in the Sector Count register that is equal to one-fourth of the desired maximum average
current (in mA) that the card should consume. For example, if the Sector Count register were set to 6, the card
would be configured to provide the best possible performance without exceeding 24 mA. Upon completion of
the command, the card responds to the host with the range of values supported by the card. The minimum
value is set in the Cylinder Low register, and the maximum value is set in the Cylinder Hi register. The default
value, after a power on reset, is to operate at the highest performance and therefore the highest current mode.
The card shall accept values outside this programmable range, but shall operate at either the lowest power or
highest performance as appropriate.
Features 66h and CCh can be used to enable and disable whether the Power On Reset (POR) Defaults shall be set
when a soft reset occurs. The default setting is to revert to the POR defaults when a soft reset occurs.
6.23 Set max address (F9h)
The Set max address command sets the max address of the drive. It is related to the Host protected Area feature
set. Table 46 defines the Set max address command Byte sequence.
Table 46: Read native max address
Task File Register
7
6
5
4
3
2
1
0
COMMAND
F8h
DRIVE/HEAD
nu
LBA
nu
D
Set max LBA (27:24)
CYLINDER HI
CYLINDER LOW
SECTOR NUM
Set max LBA (23:16)
Set max LBA (15:8)
Set max LBA (7:0)
SECTOR COUNT
FEATURES
nu
Feature
VV
The LBA bit shall be set to one to specify the address is an LBA. DEV shall specify the selected device.
Prerequisites
DRDY set to one. A successful READ NATIVE MAX ADDRESS command shall immediately precede a SET MAX ADDRESS
command.
VV =Value volatile. If bit 0 is set to one, the device shall preserve the maximum values over power-up or
hardware reset. If bit 0 is cleared to zero, the device shall revert to the most recent nonvolatile maximum
address value setting over power-up or hardware reset.
The set max address can be locked/unlocked and secured by password with following features:
Table 47: Set max features
Feature register
00h
01h
02h
03h
04h
05-FFh
Command
Obsolete
SET MAX SET PASSWORD
SET MAX LOCK
SET MAX UNLOCK
SET MAX FREEZE LOCK
Reserved
Typical use of the Set max address (F9h) and Read native max address (F8h) commands would be:
On reset
BIOS receives control after a system reset;
1.
2.
BIOS issues a READ NATIVE MAX ADDRESS command to find the max capacity of the device;
BIOS issues a SET MAX ADDRESS command to the values returned by READ NATIVE MAX ADDRESS;
3. BIOS reads configuration data from the highest area on the disk;
Swissbit AG
Industriestrasse 4
Swissbit reserves the right to change products or specifications without notice.
Revision: 1.41
CH-9552 Bronschhofen
Switzerland
www.swissbit.com
industrial@swissbit.com
F-100_data_sheet_CA-HxBR_Rev141.doc
Page 31 of 51
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