参数资料
型号: SFCF8192H2BU2TO-I-QT-517-STD
厂商: Swissbit NA Inc
文件页数: 61/102页
文件大小: 0K
描述: FLASH SLC UDMA/MDMA/PIO 8GB
标准包装: 1
系列: C-440
存储容量: 8GB
存储器类型: CompactFlash?
其它名称: 1052-1092
Table 64: Identify Device Information
Word
Address
0
Default
Value
848Ah*
045Ah*
Total
Bytes
2
2
Data Field Type Information
General Configuration (REMOVABLE, signature of the CompactFlash TM Memory Card) In
PC card mode the HxBU cards have normally the value 848Ah
but other configurations are possible
Alternate Configuration FIX,
In IDE mode the HxBU cards have normally the value 045Ah
but other configurations are possible
1
2
3
4
5
6
7-8
9
10-19
20
21
22
23-26
27-46
47
48
49
50
51
52
53
54
55
56
57-58
59
60-61
62
63
64
65
66
67
68
69-79
80-81
XXXXh
0000h
00XXh
0000h
0200h
XXXXh
XXXXh
0000h
aaaa
0002h
0001h
0004h
aaaa*
aaaa*
8001h
0000h
0F00h*
0E00h*
4001h
0200h
0000h
0007h*
XXXXh
XXXXh
XXXXh
XXXXh
010Xh
XXXXh
0000h
0007h*
0000h*
0003h
0078h*
0000h*
0078h*
0000h*
0078h*
0078h*
0000h
01E0h
0000h
2
2
2
2
2
2
4
2
20
2
2
2
8
40
2
2
2
2
2
2
2
2
2
2
4
2
4
2
2
2
2
2
2
2
22
4
Default number of cylinders
Reserved
Default number of heads
Obsolete
Obsolete
Default number of sectors per track
Number of sectors per Card (Word 7 = MSW, Word 8 = LSW)
Obsolete
Serial number in ASCII (right justified)
Buffer type
Buffer size
Reserved
Firmware revision in ASCII. Big Endian Byte Order in Word
Model number in ASCII (right justified) Big Endian Byte Order in Word
( “SFCFxxxxHxB UxTO-x-xx-xxx-xxx ” )
Maximum number of sectors on Read/Write Multiple command
Reserved
Capabilities with DMA
without DMA
Capabilities: device specific standby timer minimum
PIO data transfer cycle timing mode
Obsolete
Field validity
Current numbers of cylinders
Current numbers of heads
Current sectors per track
Current capacity in sectors (cylinders*heads*sectors)(Word 57 = LSW, Word 58 = MSW)
Multiple sector setting is valid
Total number of sectors addressable in LBA Mode
Single-Word DMA not implemented
Multi-Word DMA transfer Mode 0, 1, 2
for In PC card mode, this value is ‘0000h’.
Advanced PIO modes supported
Minimum Multi-Word DMA transfer cycle time per Word.
Recommended Multi-Word DMA transfer cycle time.
Minimum PIO transfer cycle time without flow control
Minimum PIO transfer cycle time with IORDY flow control
Reserved
ATA version 5,6,7,8
702Bh*
82 -84
7405h*
6
Features/command sets supported
4020h*
7009h*
85-87
3405h*
6
Features/command sets enabled
4000h*
88
89
90
91
92
93
94-99
100-103
207Fh*
0000h
0000h
0000h
FFFEh*
XXXXh*
0000h
0000h
XXXXh
2
2
2
2
2
2
12
8
Ultra DMA Mode 0,1,2,3,4,5,6 Supported and Selected (changes in operation)
Time required for Security erase unit completion
Time required for Enhanced security erase unit completion
Current Advanced power mana9ementvalue
Master Password Revision Code
Hardware reset result, 0000h in PC card mode
Reserved
Total number of sectors addressable in LBA48 mode
Swissbit AG
Industriestrasse 4
Swissbit reserves the right to change products or specifications without notice.
Revision: 1.00
CH-9552 Bronschhofen
Switzerland
www.swissbit.com
industrial@swissbit.com
C-440_data_sheet_CF-HxBU_Rev100.doc
Page 61 of 102
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