参数资料
型号: SG5841JSY
厂商: Fairchild Semiconductor
文件页数: 4/15页
文件大小: 0K
描述: IC CTLR PWM HI INTEGRATED 8-SOIC
产品变化通告: Product Discontinuation 14/Mar/2011
标准包装: 2,500
输出隔离: 隔离
频率范围: 62kHz ~ 68kHz
输入电压: 11 V ~ 24.7 V
输出电压: 18V
工作温度: -20°C ~ 85°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: *
包装: 带卷 (TR)
Pin Configuration
GND
FB
VIN
RI
GATE
VDD
SENSE
RT
Figure 4. Pin Configuration
Pin Definitions
Pin #
1
Name
GND
Function
Ground
Ground.
Description
The signal from the external compensation circuit is fed into this pin. The PWM
2
FB
Feedback
duty cycle is determined in response to the signal from this pin and the current-
sense signal from pin 6. If FB voltage exceeds the threshold, the internal
protection circuit disables PWM output after a predetermined delay time.
For startup, this pin is pulled HIGH to the rectified line input via a resistor. Since
3
VIN
Startup Input the startup current requirement is very small, a large startup resistance is used to
minimize power loss.
4
RI
Reference
Setting
A resistor connected from the RI to GND provides a constant current source. This
determines the center PWM frequency. Increasing the resistance reduces PWM
frequency. Using a 26K ? resistor results in a 65KHz center PWM frequency.
For over-temperature protection. An external NTC thermistor is connected from
5
RT
Temperature this pin to the GND pin. The impedance of the NTC decreases at high
Detection temperatures. Once the voltage of the RT pin drops below a fixed limit, PWM
output is disabled.
6
7
8
SENSE
VDD
GATE
Current
Sense
Power
Supply
Driver Output
Current sense. The sensed voltage is used for peak-current-mode control and
cycle-by-cycle current limiting.
Power supply. If V DD exceeds a threshold, the internal protection circuit disables
PWM output.
The totem-pole output driver for the power MOSFET, which is internally clamped
below 18V.
? 2006 Fairchild Semiconductor Corporation
SG5841J ? Rev. 1.3.5
4
www.fairchildsemi.com
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